[RFC PATCH v1 06/30] KVM: arm64: COCCI: use_ctxt_access.cocci: use kvm_cpu_context accessors
Fuad Tabba
tabba at google.com
Fri Sep 24 05:53:35 PDT 2021
Some parts of the code access vcpu->arch.ctxt directly instead of
using existing accessors. Refactor to use the existing accessors
to make the code more consistent and to simplify future patches.
This applies the semantic patch with the following command:
spatch --sp-file cocci_refactor/use_ctxt_access.cocci --dir arch/arm64/kvm/ --include-headers --in-place
Signed-off-by: Fuad Tabba <tabba at google.com>
---
arch/arm64/kvm/fpsimd.c | 2 +-
arch/arm64/kvm/guest.c | 28 +++++++++++-----------
arch/arm64/kvm/hyp/include/hyp/switch.h | 4 ++--
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 16 ++++++-------
arch/arm64/kvm/reset.c | 10 ++++----
5 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm64/kvm/fpsimd.c b/arch/arm64/kvm/fpsimd.c
index 5621020b28de..db135588236a 100644
--- a/arch/arm64/kvm/fpsimd.c
+++ b/arch/arm64/kvm/fpsimd.c
@@ -97,7 +97,7 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu)
WARN_ON_ONCE(!irqs_disabled());
if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) {
- fpsimd_bind_state_to_cpu(&vcpu->arch.ctxt.fp_regs,
+ fpsimd_bind_state_to_cpu(vcpu_fp_regs(vcpu),
vcpu->arch.sve_state,
vcpu->arch.sve_max_vl);
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index 5cb4a1cd5603..c4429307a164 100644
--- a/arch/arm64/kvm/guest.c
+++ b/arch/arm64/kvm/guest.c
@@ -116,49 +116,49 @@ static void *core_reg_addr(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
KVM_REG_ARM_CORE_REG(regs.regs[30]):
off -= KVM_REG_ARM_CORE_REG(regs.regs[0]);
off /= 2;
- return &vcpu->arch.ctxt.regs.regs[off];
+ return &vcpu_gp_regs(vcpu)->regs[off];
case KVM_REG_ARM_CORE_REG(regs.sp):
- return &vcpu->arch.ctxt.regs.sp;
+ return &vcpu_gp_regs(vcpu)->sp;
case KVM_REG_ARM_CORE_REG(regs.pc):
- return &vcpu->arch.ctxt.regs.pc;
+ return &vcpu_gp_regs(vcpu)->pc;
case KVM_REG_ARM_CORE_REG(regs.pstate):
- return &vcpu->arch.ctxt.regs.pstate;
+ return &vcpu_gp_regs(vcpu)->pstate;
case KVM_REG_ARM_CORE_REG(sp_el1):
- return __ctxt_sys_reg(&vcpu->arch.ctxt, SP_EL1);
+ return &__vcpu_sys_reg(vcpu, SP_EL1);
case KVM_REG_ARM_CORE_REG(elr_el1):
- return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1);
+ return &__vcpu_sys_reg(vcpu, ELR_EL1);
case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_EL1]):
- return __ctxt_sys_reg(&vcpu->arch.ctxt, SPSR_EL1);
+ return &__vcpu_sys_reg(vcpu, SPSR_EL1);
case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_ABT]):
- return &vcpu->arch.ctxt.spsr_abt;
+ return vcpu_spsr_abt(vcpu);
case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_UND]):
- return &vcpu->arch.ctxt.spsr_und;
+ return vcpu_spsr_und(vcpu);
case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_IRQ]):
- return &vcpu->arch.ctxt.spsr_irq;
+ return vcpu_spsr_irq(vcpu);
case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_FIQ]):
- return &vcpu->arch.ctxt.spsr_fiq;
+ return vcpu_spsr_fiq(vcpu);
case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ...
KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]):
off -= KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]);
off /= 4;
- return &vcpu->arch.ctxt.fp_regs.vregs[off];
+ return &vcpu_fp_regs(vcpu)->vregs[off];
case KVM_REG_ARM_CORE_REG(fp_regs.fpsr):
- return &vcpu->arch.ctxt.fp_regs.fpsr;
+ return &vcpu_fp_regs(vcpu)->fpsr;
case KVM_REG_ARM_CORE_REG(fp_regs.fpcr):
- return &vcpu->arch.ctxt.fp_regs.fpcr;
+ return &vcpu_fp_regs(vcpu)->fpcr;
default:
return NULL;
diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index e4a2f295a394..9fa9cf71eefa 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
@@ -217,7 +217,7 @@ static inline void __hyp_sve_restore_guest(struct kvm_vcpu *vcpu)
{
sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2);
__sve_restore_state(vcpu_sve_pffr(vcpu),
- &vcpu->arch.ctxt.fp_regs.fpsr);
+ &vcpu_fp_regs(vcpu)->fpsr);
write_sysreg_el1(__vcpu_sys_reg(vcpu, ZCR_EL1), SYS_ZCR);
}
@@ -276,7 +276,7 @@ static inline bool __hyp_handle_fpsimd(struct kvm_vcpu *vcpu)
if (sve_guest)
__hyp_sve_restore_guest(vcpu);
else
- __fpsimd_restore_state(&vcpu->arch.ctxt.fp_regs);
+ __fpsimd_restore_state(vcpu_fp_regs(vcpu));
/* Skip restoring fpexc32 for AArch64 guests */
if (!(read_sysreg(hcr_el2) & HCR_RW))
diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
index cce43bfe158f..9451206f512e 100644
--- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
+++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
@@ -161,10 +161,10 @@ static inline void __sysreg32_save_state(struct kvm_vcpu *vcpu)
if (!vcpu_el1_is_32bit(vcpu))
return;
- vcpu->arch.ctxt.spsr_abt = read_sysreg(spsr_abt);
- vcpu->arch.ctxt.spsr_und = read_sysreg(spsr_und);
- vcpu->arch.ctxt.spsr_irq = read_sysreg(spsr_irq);
- vcpu->arch.ctxt.spsr_fiq = read_sysreg(spsr_fiq);
+ *vcpu_spsr_abt(vcpu) = read_sysreg(spsr_abt);
+ *vcpu_spsr_und(vcpu) = read_sysreg(spsr_und);
+ *vcpu_spsr_irq(vcpu) = read_sysreg(spsr_irq);
+ *vcpu_spsr_fiq(vcpu) = read_sysreg(spsr_fiq);
__vcpu_sys_reg(vcpu, DACR32_EL2) = read_sysreg(dacr32_el2);
__vcpu_sys_reg(vcpu, IFSR32_EL2) = read_sysreg(ifsr32_el2);
@@ -178,10 +178,10 @@ static inline void __sysreg32_restore_state(struct kvm_vcpu *vcpu)
if (!vcpu_el1_is_32bit(vcpu))
return;
- write_sysreg(vcpu->arch.ctxt.spsr_abt, spsr_abt);
- write_sysreg(vcpu->arch.ctxt.spsr_und, spsr_und);
- write_sysreg(vcpu->arch.ctxt.spsr_irq, spsr_irq);
- write_sysreg(vcpu->arch.ctxt.spsr_fiq, spsr_fiq);
+ write_sysreg(*vcpu_spsr_abt(vcpu), spsr_abt);
+ write_sysreg(*vcpu_spsr_und(vcpu), spsr_und);
+ write_sysreg(*vcpu_spsr_irq(vcpu), spsr_irq);
+ write_sysreg(*vcpu_spsr_fiq(vcpu), spsr_fiq);
write_sysreg(__vcpu_sys_reg(vcpu, DACR32_EL2), dacr32_el2);
write_sysreg(__vcpu_sys_reg(vcpu, IFSR32_EL2), ifsr32_el2);
diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
index d37ebee085cf..ab1ef5313a3e 100644
--- a/arch/arm64/kvm/reset.c
+++ b/arch/arm64/kvm/reset.c
@@ -258,11 +258,11 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
/* Reset core registers */
memset(vcpu_gp_regs(vcpu), 0, sizeof(*vcpu_gp_regs(vcpu)));
- memset(&vcpu->arch.ctxt.fp_regs, 0, sizeof(vcpu->arch.ctxt.fp_regs));
- vcpu->arch.ctxt.spsr_abt = 0;
- vcpu->arch.ctxt.spsr_und = 0;
- vcpu->arch.ctxt.spsr_irq = 0;
- vcpu->arch.ctxt.spsr_fiq = 0;
+ memset(vcpu_fp_regs(vcpu), 0, sizeof(*vcpu_fp_regs(vcpu)));
+ *vcpu_spsr_abt(vcpu) = 0;
+ *vcpu_spsr_und(vcpu) = 0;
+ *vcpu_spsr_irq(vcpu) = 0;
+ *vcpu_spsr_fiq(vcpu) = 0;
vcpu_gp_regs(vcpu)->pstate = pstate;
/* Reset system registers */
--
2.33.0.685.g46640cef36-goog
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