[PATCH v2 2/9] perf cs-etm: Initialise architecture based on TRCIDR1

[Mike Leach]

On Fri, 3 Sept 2021 at 12:07, Arnaldo Carvalho de Melo <acme at kernel.org> wrote:
>
> Em Fri, Sep 03, 2021 at 09:55:37AM +0100, Suzuki K Poulose escreveu:
> > On 06/08/2021 14:41, James Clark wrote:
> > > Currently the architecture is hard coded as ARCH_V8, but from ETMv4.4
> > > onwards this should be ARCH_AA64.
> > >
> > > Signed-off-by: James Clark <james.clark at arm.com>
> > > ---
> > >   tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 16 +++++++++++++++-
> > >   1 file changed, 15 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
> > > index 187c038caa19..787b19642e78 100644
> > > --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
> > > +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
> > > @@ -126,6 +126,20 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params,
> > >     return 0;
> > >   }
> > > +#define TRCIDR1_TRCARCHMIN_SHIFT 4
> > > +#define TRCIDR1_TRCARCHMIN_MASK  GENMASK(7, 4)
> > > +#define TRCIDR1_TRCARCHMIN(x)    (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT)
> >
> > minor nit: Please add a blank line here
>
> Fixed it
>
> > > +static enum _ocsd_arch_version cs_etm_decoder__get_etmv4_arch_ver(u32 reg_idr1)
> > > +{
> > > +   /*
> > > +    * For ETMv4 if the trace minor version is 4 or more then we can assume
> > > +    * the architecture is ARCH_AA64 rather than just V8.
> > > +    * ARCH_V8 = V8 architecture
> > > +    * ARCH_AA64 = Min v8r3 plus additional AA64 PE features
> >
> > Does this need to be >= 3 then, to be accurate ?
> >
> > The comment "reads", minimum v8.3 and any additional features.
> >
> > Otherwise looks good to me.
>

Behaviour correctly matches OpenCSD decoder requirements.

Reviewed-by: Mike Leach <mike.leach at linaro.org>



> Didn't have enough coffee, I think, can you please provide this as a
> patch? :)
>
> - Arnaldo



--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK