[PATCH 1/2] dt-bindings: coresight: Add burst size for TMC
Mike Leach
mike.leach at linaro.org
Thu Sep 2 09:27:31 PDT 2021
On Wed, 1 Sept 2021 at 14:12, Tanmay Jagdale <tanmay at marvell.com> wrote:
>
> Add "arm,max-burst-size" optional property for TMC ETR.
> If specified, this value indicates the maximum burst size
> that can be initiated by TMC on the AXI bus.
>
> Signed-off-by: Tanmay Jagdale <tanmay at marvell.com>
> ---
> Documentation/devicetree/bindings/arm/coresight.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
> index 7f9c1ca87487..7971f8dba2ee 100644
> --- a/Documentation/devicetree/bindings/arm/coresight.txt
> +++ b/Documentation/devicetree/bindings/arm/coresight.txt
> @@ -127,6 +127,11 @@ its hardware characteristcs.
> * arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely
> use the SG mode on this system.
>
> + * arm,max-burst-size: The maximum burst size initiated by TMC on the
> + AXI master interface. The burst size can be in the range [0..15],
> + the setting supports one data transfer per burst upto a maximum of
> + 16 data transfers per burst.
> +
> * Optional property for CATU :
> * interrupts : Exactly one SPI may be listed for reporting the address
> error
> --
> 2.25.1
>
Reviewed-by: Mike Leach <mike.leach at linaro.org>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
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