[PATCH V2] pwm: Use div64_ul instead of do_div
cgel.zte at gmail.com
cgel.zte at gmail.com
Wed Nov 17 04:46:53 PST 2021
From: Changcheng Deng <deng.changcheng at zte.com.cn>
do_div() does a 64-by-32 division. If the divisor is unsigned long, using
div64_ul can avoid truncation to 32-bit.
Reported-by: Zeal Robot <zealci at zte.com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng at zte.com.cn>
---
drivers/pwm/pwm-atmel-hlcdc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c
index a43b2babc809..1ae3d73b9832 100644
--- a/drivers/pwm/pwm-atmel-hlcdc.c
+++ b/drivers/pwm/pwm-atmel-hlcdc.c
@@ -60,7 +60,7 @@ static int atmel_hlcdc_pwm_apply(struct pwm_chip *c, struct pwm_device *pwm,
return -EINVAL;
clk_period_ns = (u64)NSEC_PER_SEC * 256;
- do_div(clk_period_ns, clk_freq);
+ clk_period_ns = div64_ul(clk_period_ns, clk_freq);
}
/* Errata: cannot use slow clk on some IP revisions */
@@ -72,7 +72,7 @@ static int atmel_hlcdc_pwm_apply(struct pwm_chip *c, struct pwm_device *pwm,
return -EINVAL;
clk_period_ns = (u64)NSEC_PER_SEC * 256;
- do_div(clk_period_ns, clk_freq);
+ clk_period_ns = div64_ul(clk_period_ns, clk_freq);
}
for (pres = 0; pres <= ATMEL_HLCDC_PWMPS_MAX; pres++) {
--
2.25.1
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