[PATCH v3] ARM: dts: ux500: Fix BT+WLAN on Janice

[Linus Walleij]

Rename the regulator and handle to indicate that it
handles both WLAN and BT.

The BCM4330 WL_RESET is connected to GPIO215
and needs to be driven high so that the WLAN
chip goes out of reset and enumerates on the
SDIO bus. Since the device will not probe until
the SDIO card enumerates, we need to hack the
pin config for GPIO215 into the regulator so
that when VMMC is enabled, we also de-assert
WL_RESET and the WLAN comes up.

We cannot have the pin config as part of the
WLAN device since pin configs are applied when
probing, and probing doesn't happen unless
WL_RESET is deasserted (catch 22).

Add explicit BCM4330 compatible to the WLAN chip.

Cc: Stephan Gerhold <stephan at gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
---
ChangeLog v2->v3:
- Break out patch, Janice has BCM4330 and is different
  from Golden and Skomer.
ChangeLog v1->v2:
- Change compatible strings on the WLAN chips to be
  specific-to-generic indicating the exact model.
---
 .../arm/boot/dts/ste-ux500-samsung-janice.dts | 43 ++++++++++++-------
 1 file changed, 27 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
index 7411bfeda285..3da0a8b97df2 100644
--- a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
+++ b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
@@ -135,14 +135,20 @@ lcd_1v8_reg: regulator-gpio-lcd-1v8 {
 
 	/*
 	 * This regulator is a GPIO line that drives the Broadcom WLAN
-	 * line BT_VREG_EN high and enables the internal regulators
-	 * inside the chip.
+	 * and Bluetooth line BT_VREG_EN high and enables the internal
+	 * regulators inside the chip.
+	 *
+	 * The chip actually has two signals for powering on WLAN and
+	 * BT: BT_REG_ON and WL_REG_ON, but since these are OR:ed inside
+	 * the chip the system designers have decided to connect just one
+	 * of them, however both WLAN and BT need to enable this supply
+	 * to power each part on, so it is a shared regulator.
 	 *
 	 * The voltage specified here is only used to determine the OCR mask,
 	 * the for the SDIO connector, the chip is actually connected
 	 * directly to VBAT.
 	 */
-	wl_bt_reg: regulator-gpio-wlan {
+	wl_bt_reg: regulator-gpio-wlan-bt {
 		compatible = "regulator-fixed";
 		regulator-name = "BT_VREG_EN";
 		regulator-min-microvolt = <3000000>;
@@ -152,7 +158,7 @@ wl_bt_reg: regulator-gpio-wlan {
 		gpio = <&gpio6 30 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 		pinctrl-names = "default";
-		pinctrl-0 = <&wlan_ldo_en_default>;
+		pinctrl-0 = <&wlan_bt_ldo_en_default>;
 	};
 
 
@@ -401,15 +407,13 @@ mmc at 80118000 {
 			status = "okay";
 
 			wifi at 1 {
-				/* Actually BRCM4330 */
-				compatible = "brcm,bcm4329-fmac";
+				compatible = "brcm,bcm4330-fmac", "brcm,bcm4329-fmac";
 				reg = <1>;
 				/* GPIO216 WL_HOST_WAKE */
 				interrupt-parent = <&gpio6>;
 				interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
 				interrupt-names = "host-wake";
 				/* GPIO215  WLAN_RST_N */
-				/* FIXME: kernel does not use this assert/deassert */
 				reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&wlan_default_mode>;
@@ -439,13 +443,15 @@ uart at 80120000 {
 			status = "okay";
 
 			bluetooth {
+				/* BRCM4330B1 actually */
 				compatible = "brcm,bcm4330-bt";
 				/*
 				 * We actually have shutdown-gpios, BT_VREG_EN on GPIO222,
 				 * but since this GPIO is shared with the WLAN chip, we need
 				 * to reference the regulator instead. The regulator
 				 * framework will reference count the GPIO usage and
-				 * make sure we can use the same GPIO for several supplies.
+				 * make sure we can use the same GPIO regulator for several
+				 * supplies.
 				 */
 				// shutdown-gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
 				vbat-supply = <&wl_bt_reg>;
@@ -756,14 +762,24 @@ janice_cfg1 {
 			};
 		};
 	};
-	/* GPIO that enables the WLAN internal LDO regulators */
-	wlan-ldo {
-		wlan_ldo_en_default: wlan_ldo_default {
+	/* GPIO that enables the WLAN and Bluetooth internal LDO regulators */
+	wlan-bt-ldo {
+		wlan_bt_ldo_en_default: wlan_bt_ldo_default {
 			/* GPIO222 BT_VREG_ON */
 			janice_cfg1 {
 				pins = "GPIO222_AJ9";
 				ste,config = <&gpio_out_lo>;
 			};
+			/*
+			 * HACK: this is the WL_RESET line that technically has nothing
+			 * to do with the regulator, but in order for the SDIO card
+			 * to enumerate, this must be driven high, so we need to do
+			 * that here.
+			 */
+			janice_cfg2 {
+				pins = "GPIO215_AH13";	/* RESET_N */
+				ste,config = <&gpio_out_hi>;
+			};
 		};
 	};
 	/* Flash and torch */
@@ -875,11 +891,6 @@ janice_cfg2 {
 	};
 	wlan {
 		wlan_default_mode: wlan_default {
-			/* GPIO215 used for RESET_N */
-			janice_cfg1 {
-				pins = "GPIO215_AH13";
-				ste,config = <&gpio_out_lo>;
-			};
 			/* GPIO216 for WL_HOST_WAKE */
 			janice_cfg2 {
 				pins = "GPIO216_AG12";
-- 
2.29.2