[PATCH 5.10 344/663] perf vendor events arm64: Fix Ampere eMag event typo

[Greg Kroah-Hartman]

From: John Garry <john.garry at huawei.com>

[ Upstream commit 2bf797be81fa808f05f1a7a65916619132256a27 ]

The "briefdescription" for event 0x35 has a typo - fix it.

Fixes: d35c595bf005 ("perf vendor events arm64: Revise core JSON events for eMAG")
Signed-off-by: John Garry <john.garry at huawei.com>
Acked-by: Will Deacon <will at kernel.org>
Cc: James Clark <james.clark at arm.com>
Cc: Jiri Olsa <jolsa at redhat.com>
Cc: Leo Yan <leo.yan at linaro.org>
Cc: Mark Rutland <mark.rutland at arm.com>
Cc: Mathieu Poirier <mathieu.poirier at linaro.org>
Cc: Nakamura, Shunsuke/中村 俊介 <nakamura.shun at fujitsu.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linuxarm at openeuler.org
Link: https://lore.kernel.org/r/1611835236-34696-2-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme at redhat.com>
Signed-off-by: Sasha Levin <sashal at kernel.org>
---
 tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
index 40010a8724b3a..ce6e7e7960579 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
@@ -114,7 +114,7 @@
         "PublicDescription": "Level 2 access to instruciton TLB that caused a page table walk. This event counts on any instruciton access which causes L2I_TLB_REFILL to count",
         "EventCode": "0x35",
         "EventName": "L2I_TLB_ACCESS",
-        "BriefDescription": "L2D TLB access"
+        "BriefDescription": "L2I TLB access"
     },
     {
         "PublicDescription": "Branch target buffer misprediction",
-- 
2.27.0