[PATCH 0/7] sdhci-of-arasan driver updates for ZynqMP platform

[Ulf Hansson]

On Tue, 15 Jun 2021 at 12:44, Manish Narani <manish.narani at xilinx.com> wrote:
>
> This patch series has some bug fixes for sdhci-of-arasan driver with
> respect to ZynqMP platform. This series also has some code style changes
> in the driver.
>
> Manish Narani (6):
>   mmc: sdhci-of-arasan: Modified SD default speed to 19MHz for ZynqMP
>   mmc: sdhci-of-arasan: Add "SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12" quirk.
>   mmc: sdhci-of-arasan: Skip Auto tuning for DDR50 mode in ZynqMP
>     platform
>   mmc: host: sdhci-of-arasan: Check return value of non-void funtions
>   mmc: host: sdhci-of-arasan: Use appropriate type of division macro
>   mmc: host: sdhci-of-arasan: Modify data type of the clk_phase array
>
> Sai Krishna Potthuri (1):
>   mmc: arasan: Fix the issue in reading tap values from DT
>
>  drivers/mmc/host/sdhci-of-arasan.c | 51 ++++++++++++++++++++++++++++++++------
>  1 file changed, 44 insertions(+), 7 deletions(-)
>
> --
> 2.1.1
>

Queued up for v5.15 (temporary on the devel branch) and by amending
the prefixes, thanks!

Kind regards
Uffe