[PATCH] pinctrl: armada-37xx: Correct PWM pins definitions

[Rob Herring]

On Tue, 15 Jun 2021 00:25:27 +0200, Marek Behún wrote:
> The PWM pins on North Bridge on Armada 37xx can be configured into PWM
> or GPIO functions. When in PWM function, each pin can also be configured
> to drive low on 0 and tri-state on 1 (LED mode).
> 
> The current definitions handle this by declaring two pin groups for each
> pin:
> - group "pwmN" with functions "pwm" and "gpio"
> - group "ledN_od" ("od" for open drain) with functions "led" and "gpio"
> 
> This is semantically incorrect. The correct definition for each pin
> should be one group with three functions: "pwm", "led" and "gpio".
> 
> Change the "pwmN" groups to support "led" function.
> 
> Remove "ledN_od" groups. This cannot break backwards compatibility with
> older device trees: no device tree uses it since there is no PWM driver
> for this SOC yet. Also "ledN_od" groups are not even documented.
> 
> Signed-off-by: Marek Behún <kabel at kernel.org>
> ---
>  .../pinctrl/marvell,armada-37xx-pinctrl.txt      |  8 ++++----
>  drivers/pinctrl/mvebu/pinctrl-armada-37xx.c      | 16 ++++++++--------
>  2 files changed, 12 insertions(+), 12 deletions(-)
> 

Acked-by: Rob Herring <robh at kernel.org>