[PATCH v2] clk: zynqmp: fix compile testing without ZYNQMP_FIRMWARE
Michal Simek
michal.simek at xilinx.com
Tue Jun 22 03:15:42 PDT 2021
Hi,
On 6/22/21 9:12 AM, quanyang.wang wrote:
> Hi Michal & Arnd,
>
> On 6/21/21 9:13 PM, Michal Simek wrote:
>> From: Arnd Bergmann <arnd at arndb.de>
>>
>> When the firmware code is disabled, the incomplete error handling
>> in the clk driver causes compile-time warnings:
>>
>> drivers/clk/zynqmp/pll.c: In function 'zynqmp_pll_recalc_rate':
>> drivers/clk/zynqmp/pll.c:147:29: error: 'fbdiv' is used uninitialized
>> [-Werror=uninitialized]
>> 147 | rate = parent_rate * fbdiv;
>> | ~~~~~~~~~~~~^~~~~~~
>> In function 'zynqmp_pll_get_mode',
>> inlined from 'zynqmp_pll_recalc_rate' at
>> drivers/clk/zynqmp/pll.c:148:6:
>> drivers/clk/zynqmp/pll.c:61:27: error: 'ret_payload' is used
>> uninitialized [-Werror=uninitialized]
>> 61 | return ret_payload[1];
>> | ~~~~~~~~~~~^~~
>> drivers/clk/zynqmp/pll.c: In function 'zynqmp_pll_recalc_rate':
>> drivers/clk/zynqmp/pll.c:53:13: note: 'ret_payload' declared here
>> 53 | u32 ret_payload[PAYLOAD_ARG_CNT];
>> | ^~~~~~~~~~~
>> drivers/clk/zynqmp/clk-mux-zynqmp.c: In function
>> 'zynqmp_clk_mux_get_parent':
>> drivers/clk/zynqmp/clk-mux-zynqmp.c:57:16: error: 'val' is used
>> uninitialized [-Werror=uninitialized]
>> 57 | return val;
>> | ^~~
>>
>> As it was apparently intentional to support this for compile testing
>> purposes, change the code to have just enough error handling for the
>> compiler to not notice the remaining bugs.
>>
>> Fixes: 21f237534661 ("clk: zynqmp: Drop dependency on ARCH_ZYNQMP")
>> Signed-off-by: Arnd Bergmann <arnd at arndb.de>
>> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
>> ---
>>
>> Changes in v2:
>> Based on discussion here
>> Link: https://lore.kernel.org/r/20210421134844.3297838-1-arnd@kernel.org
>> I have updated error return value which I got from clock core based on
>> error cases.
>>
>> zynqmp_clk_mux_get_parent() should return num_parents() as error
>> defined in
>> clk_core_get_parent_by_index() where num_parents is incorrect index.
>>
>> Extend zynqmp_pll_get_mode() with PLL_MODE_ERROR to handle error case.
>>
>> zynqmp_pll_recalc_rate() returns 0 because __clk_core_init() consider
>> 0 as
>> default rate. But maybe -1ul which was used by Arnd is also good option.
>>
>> ---
>> drivers/clk/zynqmp/clk-mux-zynqmp.c | 10 ++++++++--
>> drivers/clk/zynqmp/pll.c | 15 ++++++++++-----
>> 2 files changed, 18 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c
>> b/drivers/clk/zynqmp/clk-mux-zynqmp.c
>> index 06194149be83..d576c900dee0 100644
>> --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c
>> +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c
>> @@ -38,7 +38,7 @@ struct zynqmp_clk_mux {
>> * zynqmp_clk_mux_get_parent() - Get parent of clock
>> * @hw: handle between common and hardware-specific interfaces
>> *
>> - * Return: Parent index
>> + * Return: Parent index on success or number of parents in case of error
>> */
>> static u8 zynqmp_clk_mux_get_parent(struct clk_hw *hw)
>> {
>> @@ -50,9 +50,15 @@ static u8 zynqmp_clk_mux_get_parent(struct clk_hw *hw)
>> ret = zynqmp_pm_clock_getparent(clk_id, &val);
>> - if (ret)
>> + if (ret) {
>> pr_warn_once("%s() getparent failed for clock: %s, ret = %d\n",
>> __func__, clk_name, ret);
>> + /*
>> + * clk_core_get_parent_by_index() takes num_parents as incorrect
>> + * index which is exactly what I want to return here
>> + */
>> + return clk_hw_get_num_parents(hw);
>> + }
>> return val;
>> }
>> diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c
>> index abe6afbf3407..3fe4d21227d0 100644
>> --- a/drivers/clk/zynqmp/pll.c
>> +++ b/drivers/clk/zynqmp/pll.c
>> @@ -31,8 +31,9 @@ struct zynqmp_pll {
>> #define PS_PLL_VCO_MAX 3000000000UL
>> enum pll_mode {
>> - PLL_MODE_INT,
>> - PLL_MODE_FRAC,
>> + PLL_MODE_INT = 0,
>> + PLL_MODE_FRAC = 1,
>> + PLL_MODE_ERROR = 2,
>> };
>> #define FRAC_OFFSET 0x8
>> @@ -54,9 +55,11 @@ static inline enum pll_mode
>> zynqmp_pll_get_mode(struct clk_hw *hw)
>> int ret;
>> ret = zynqmp_pm_get_pll_frac_mode(clk_id, ret_payload);
>> - if (ret)
>> + if (ret) {
>> pr_warn_once("%s() PLL get frac mode failed for %s, ret =
>> %d\n",
>> __func__, clk_name, ret);
>> + return PLL_MODE_ERROR;
>> + }
>> return ret_payload[1];
>> }
>> @@ -126,7 +129,7 @@ static long zynqmp_pll_round_rate(struct clk_hw
>> *hw, unsigned long rate,
>> * @hw: Handle between common and hardware-specific
>> interfaces
>> * @parent_rate: Clock frequency of parent clock
>> *
>> - * Return: Current clock frequency
>> + * Return: Current clock frequency or 0 in case of error
>> */
>> static unsigned long zynqmp_pll_recalc_rate(struct clk_hw *hw,
>> unsigned long parent_rate)
>> @@ -140,9 +143,11 @@ static unsigned long
>> zynqmp_pll_recalc_rate(struct clk_hw *hw,
>> int ret;
>> ret = zynqmp_pm_clock_getdivider(clk_id, &fbdiv);
>> - if (ret)
>> + if (ret) {
>> pr_warn_once("%s() get divider failed for %s, ret = %d\n",
>> __func__, clk_name, ret);
>> + return 0ul;
>> + }
>>
> Since zynqmp_pll_get_mode may return err now, maybe here should add a
> condition check for PLL_MODE_ERR:
> if (zynqmp_pll_get_mode(hw) == PLL_MODE_ERR)
> return 0ul;
Agree. I have sent v3 with this there. Please review.
Thanks,
Michal
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