[PATCH v3 1/5] arm64: dts: ti: k3-am64-main: Add SERDES DT node

[Kishon Vijay Abraham I]

Nishanth,

On 27/05/21 12:14 am, Nishanth Menon wrote:
> On 19:59-20210526, Kishon Vijay Abraham I wrote:
>> AM64 has one SERDES 10G instance. Add SERDES DT node for it.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon at ti.com>
>> ---
>>  arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 56 ++++++++++++++++++++++++
>>  1 file changed, 56 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> index b2bcbf23eefd..a67f10406a8e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> @@ -5,6 +5,17 @@
>>   * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
>>   */
>>  
>> +#include <dt-bindings/phy/phy-cadence.h>
>> +#include <dt-bindings/phy/phy-ti.h>
>> +
>> +/ {
>> +	serdes_refclk: clock {
>> +		#clock-cells = <0>;
>> +		compatible = "fixed-clock";
>> +		clock-frequency = <0>;
>> +	};
>> +};
>> +
>>  &cbass_main {
>>  	oc_sram: sram at 70000000 {
>>  		compatible = "mmio-sram";
>> @@ -18,6 +29,20 @@
>>  		};
>>  	};
>>  
>> +	main_conf: syscon at 43000000 {
>> +		compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
>> +		reg = <0x0 0x43000000 0x0 0x20000>;
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +		ranges = <0x0 0x0 0x43000000 0x20000>;
>> +
>> +		serdes_ln_ctrl: mux-controller {
>> +			compatible = "mmio-mux";
> 
> Any idea where the mmio-mux binding is and status?
> I'd rather not pick up a new warning against linux-next

Rob has posted mmio-mux binding.
http://lore.kernel.org/r/20210526184839.2937899-1-robh@kernel.org

Thanks
Kishon
> 
>> +			#mux-control-cells = <1>;
>> +			mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
>> +		};
>> +	};
>> +
>>  	gic500: interrupt-controller at 1800000 {
>>  		compatible = "arm,gic-v3";
>>  		#address-cells = <2>;
>> @@ -672,4 +697,35 @@
>>  		ti,mbox-num-users = <4>;
>>  		ti,mbox-num-fifos = <16>;
>>  	};
>> +
>> +	serdes_wiz0: wiz at f000000 {
>> +		compatible = "ti,am64-wiz-10g";
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +		power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
>> +		clocks = <&k3_clks 162 0>, <&k3_clks 162 1>, <&serdes_refclk>;
>> +		clock-names = "fck", "core_ref_clk", "ext_ref_clk";
>> +		num-lanes = <1>;
>> +		#reset-cells = <1>;
>> +		#clock-cells = <1>;
>> +		ranges = <0x0f000000 0x0 0x0f000000 0x00010000>;
>> +
>> +		assigned-clocks = <&k3_clks 162 1>;
>> +		assigned-clock-parents = <&k3_clks 162 5>;
>> +
>> +		serdes0: serdes at f000000 {
>> +			compatible = "ti,j721e-serdes-10g";
>> +			reg = <0x0f000000 0x00010000>;
>> +			reg-names = "torrent_phy";
>> +			resets = <&serdes_wiz0 0>;
>> +			reset-names = "torrent_reset";
>> +			clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>;
>> +			clock-names = "refclk", "phy_en_refclk";
>> +			assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, <&serdes_wiz0 TI_WIZ_REFCLK_DIG>;
>> +			assigned-clock-parents = <&k3_clks 162 1>, <&k3_clks 162 1>, <&k3_clks 162 1>;
> 
> Could we line these up to < 100 chars?
> 
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +			#clock-cells = <1>;
>> +		};
>> +	};
>>  };
>> -- 
>> 2.17.1
>>
>