Linux kernel set the hypervisor vector table through ATF

[Dongjiu Geng]

Mark Rutland <mark.rutland at arm.com> 于2021年6月1日周二 下午5:19写道：
>
> On Fri, May 28, 2021 at 05:26:51PM +0800, Dongjiu Geng wrote:
> > Hi All,
> >       when Linux kernel boot from EL1,  there is no method to let
> > kernel to enter EL2 to enable hypervisor.  so I want to add an SMC
> > interface between kernel and EL3 ATF to let kernel can set the
> > hypervisor vector table,  then can enter EL2 to enable hypervisor, as
> > shown in [1].
> > Do you agree?  Otherwise there is no method to enter EL2 hypervisor
> > when kernel boot from EL1, because the hypervisor vector
> > table(vbar_el2) is unknown.
>
> The kernel already supported being booted at EL2, where it will install
> itself as the hypervisor (and will drop to EL1 if required). EL2 is the
> preferred boot mode, as we document in:
>
> https://www.kernel.org/doc/html/latest/arm64/booting.html
>
> ... where we say:
>
> | The CPU must be in either EL2 (RECOMMENDED in order to have access to
> | the virtualisation extensions) or non-secure EL1.
>
> We *strongly* prefer this over adding new ABIs to transition from EL1 to
> EL2. Please boot the kernel at EL2 if you want to use KVM.

Thanks for the answer.
If use KVM, it should boot from EL2.  But if the hypervisor is not
KVM, such as Jailhouse hypervisor and some Chip manufacturer boot the
host kernel from EL1(not follow above rule), it seems there is not way
to enter the Jailhouse hypervisor.

>
> Thanks,
> Mark.
>
> >
> >
> >
> > [1]:
> > el1_sync:
> >         cmp     x0, #SMC_SET_VECTORS
> >         b.ne    2f
> >         msr     vbar_el2, x1
> >         b       9f
> >
> > 2:      cmp     x0, #SMC_SOFT_RESTART
> >         b.ne    3f
> >         mov     x0, x2
> >         mov     x2, x4
> >         mov     x4, x1
> >         mov     x1, x3
> >         br      x4                              // no return
> >
> > 3:      cmp     x0, #SMC_RESET_VECTORS
> >         beq     9f                              // Nothing to reset!
> >
> >         ldr     x0, =SMC_STUB_ERR
> >         eret
> >
> > 9:      mov     x0, xzr
> >         eret
> > ENDPROC(el1_sync)
> >
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