[PATCH 05/10] coresight: trbe: Allow driver to choose a different alignment
Suzuki K Poulose
suzuki.poulose at arm.com
Fri Jul 30 07:29:05 PDT 2021
On 30/07/2021 12:02, Anshuman Khandual wrote:
>
>
> On 7/28/21 7:22 PM, Suzuki K Poulose wrote:
>> The TRBE hardware mandates a minimum alignment for the TRBPTR_EL1,
>> advertised via the TRBIDR_EL1. This is used by the driver to
>> align the buffer write head. This patch allows the driver to
>> choose a different alignment from that of the hardware, by
>> decoupling the alignment tracking. This will be useful for
>> working around errata.
>>
>> Cc: Mathieu Poirier <mathieu.poirier at linaro.org>
>> Cc: Anshuman Khandual <anshuman.khandual at arm.com>
>> Cc: Mike Leach <mike.leach at linaro.org>
>> Cc: Leo Yan <leo.yan at linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose at arm.com>
>> ---
>> drivers/hwtracing/coresight/coresight-trbe.c | 12 ++++++++----
>> 1 file changed, 8 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
>> index 9735d514c5e1..9ea28813182b 100644
>> --- a/drivers/hwtracing/coresight/coresight-trbe.c
>> +++ b/drivers/hwtracing/coresight/coresight-trbe.c
>> @@ -92,7 +92,8 @@ static unsigned long trbe_errata_cpucaps[TRBE_ERRATA_MAX] = {
>> /*
>> * struct trbe_cpudata: TRBE instance specific data
>> * @trbe_flag - TRBE dirty/access flag support
>> - * @tbre_align - Actual TRBE alignment required for TRBPTR_EL1.
>> + * @trbe_hw_align - Actual TRBE alignment required for TRBPTR_EL1.
>> + * @trbe_align - Software alignment used for the TRBPTR_EL1,
>> * @cpu - CPU this TRBE belongs to.
>> * @mode - Mode of current operation. (perf/disabled)
>> * @drvdata - TRBE specific drvdata
>> @@ -100,6 +101,7 @@ static unsigned long trbe_errata_cpucaps[TRBE_ERRATA_MAX] = {
>> */
>> struct trbe_cpudata {
>> bool trbe_flag;
>> + u64 trbe_hw_align;
>> u64 trbe_align;
>> int cpu;
>> enum cs_mode mode;
>> @@ -906,7 +908,7 @@ static ssize_t align_show(struct device *dev, struct device_attribute *attr, cha
>> {
>> struct trbe_cpudata *cpudata = dev_get_drvdata(dev);
>>
>> - return sprintf(buf, "%llx\n", cpudata->trbe_align);
>> + return sprintf(buf, "%llx\n", cpudata->trbe_hw_align);
>> }
>> static DEVICE_ATTR_RO(align);
>>
>> @@ -995,11 +997,13 @@ static void arm_trbe_probe_cpu(void *info)
>> }
>>
>> trbe_check_errata(cpudata);
>> - cpudata->trbe_align = 1ULL << get_trbe_address_align(trbidr);
>> - if (cpudata->trbe_align > SZ_2K) {
>> +
>> + cpudata->trbe_hw_align = 1ULL << get_trbe_address_align(trbidr);
>> + if (cpudata->trbe_hw_align > SZ_2K) {
>> pr_err("Unsupported alignment on cpu %d\n", cpu);
>> goto cpu_clear;
>> }
>> + cpudata->trbe_align = cpudata->trbe_hw_align;
>
> When it changes, it must be asserted that trbe_align would be a multiple
> of trbe_hw_align before existing from arm_trbe_probe_cpu().
We only set it to PAGE_SIZE, which is one of 4K, 16K, 64K all of which
are aligned to 2K or any of the smaller alignment supported by TRBE.
>
>> cpudata->trbe_flag = get_trbe_flag_update(trbidr);
>> cpudata->cpu = cpu;
>> cpudata->drvdata = drvdata;
>>
>
> Reviewed-by: Anshuman Khandual <anshuman.khandual at arm.com>
>
Thanks
Suzuki
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