[PATCH v4] arm64: mte: optimize GCR_EL1 modification on kernel entry/exit
Catalin Marinas
catalin.marinas at arm.com
Wed Jul 28 10:46:16 PDT 2021
On Tue, 13 Jul 2021 18:36:38 -0700, Peter Collingbourne wrote:
> Accessing GCR_EL1 and issuing an ISB can be expensive on some
> microarchitectures. Although we must write to GCR_EL1, we can
> restructure the code to avoid reading from it because the new value
> can be derived entirely from the exclusion mask, which is already in
> a GPR. Do so.
Applied to arm64 (for-next/mte), thanks!
[1/1] arm64: mte: optimize GCR_EL1 modification on kernel entry/exit
https://git.kernel.org/arm64/c/afdfd93a53ae
--
Catalin
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