[PATCH 2/8] drivers/perf: hisi: Add PMU version for uncore PMU drivers.

[Shaokun Zhang]

Hi John,

在 2021/1/26 19:46, John Garry 写道:
> On 31/12/2020 06:19, Shaokun Zhang wrote:
> 
> nit: the subject is a little ambiguous. Maybe could have "Add v1 hw PMU symbol versioning for uncore
> PMU drivers"
> 
>> For HiSilicon uncore PMU, more versions are supported and some variables
>> shall be added suffiex to distinguish the version which are prepared for
> 
> suffix

Ok,

> 
>> the new drivers.
>>
>> Cc: Mark Rutland <mark.rutland at arm.com>
>> Cc: Will Deacon <will at kernel.org>
>> Cc: John Garry <john.garry at huawei.com>
>> Cc: Jonathan Cameron <Jonathan.Cameron at huawei.com>
>> Co-developed-by: Qi Liu <liuqi115 at huawei.com>
>> Signed-off-by: Qi Liu <liuqi115 at huawei.com>
>> Signed-off-by: Shaokun Zhang <zhangshaokun at hisilicon.com>
> 
> Apart from some small issues:
> Reviewed-by: John Garry <john.garry at huawei.com>
> 

thanks for your tag,

>> ---
>>   drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 95 ++++++++++++++-------------
>>   drivers/perf/hisilicon/hisi_uncore_hha_pmu.c  | 27 ++++----
>>   drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c  | 24 +++----
>>   3 files changed, 74 insertions(+), 72 deletions(-)
>>
>> diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
>> b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
>> index 69ccbe02f1e3..7f940c47b833 100644
>> --- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
>> +++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
>> @@ -36,8 +36,8 @@
>>     /* DDRC has 8-counters */
>>   #define DDRC_NR_COUNTERS    0x8
>> -#define DDRC_PERF_CTRL_EN    0x2
>> -
>> +#define DDRC_V1_PERF_CTRL_EN    0x2
>> +#define DDRC_V1_NR_EVENTS    0x07
>>   /*
>>    * For DDRC PMU, there are eight-events and every event has been mapped
>>    * to fixed-purpose counters which register offset is not consistent.
>> @@ -53,26 +53,26 @@ static const u32 ddrc_reg_off[] = {
>>     /*
>>    * Select the counter register offset using the counter index.
>> - * In DDRC there are no programmable counter, the count
>> + * In PMU v1, there are no programmable counter, the count
>>    * is readed form the statistics counter register itself.
> 
> comment on existing code:
> 
> /s/is readed form/is read from/
> 

Ok,

Thanks,
Shaokun

>>    */
>> -static u32 hisi_ddrc_pmu_get_counter_offset(int cntr_idx)
>> +static u32 hisi_ddrc_pmu_v1_get_counter_offset(int cntr_idx)
>>   {
>>       return ddrc_reg_off[cntr_idx];
>>   }
>>   
> .