[PATCH 2/2] ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock

[Alexandre TORGUE]

Hi Marek

On 12/1/20 12:14 PM, Marek Vasut wrote:
> The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
> or without one on the SDMMC1 interface. Because the SDMMC1 interface is
> limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
> clock to permit operation of the same U-Boot image on both SoM with and
> without voltage level shifter.
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Alexandre Torgue <alexandre.torgue at st.com>
> Cc: Maxime Coquelin <mcoquelin.stm32 at gmail.com>
> Cc: Patrice Chotard <patrice.chotard at st.com>
> Cc: Patrick Delaunay <patrick.delaunay at st.com>
> Cc: linux-stm32 at st-md-mailman.stormreply.com
> To: linux-arm-kernel at lists.infradead.org
> ---
>   arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
> index 97c6e0cd582c..2a20818c91e4 100644
> --- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
> +++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
> @@ -394,7 +394,6 @@ &sdmmc1 {
>   	disable-wp;
>   	st,sig-dir;
>   	st,neg-edge;
> -	st,use-ckin;
>   	bus-width = <4>;
>   	vmmc-supply = <&vdd_sd>;
>   	status = "okay";
> 

Applied on stm32-next.

Thanks.
Alex