[xlnx:xlnx_rebase_v5.4 16/1697] drivers/mtd/nand/raw/nand_onfi.c:297:26: sparse: sparse: cast to restricted __le16
kernel test robot
lkp at intel.com
Tue Jan 12 13:55:35 EST 2021
tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.4
head: 629150468791671b5fde21363e643e87c5815b17
commit: 535b606b074de913935e28235504c248c657f9ea [16/1697] mtd: rawnand: Add jedec_id to struct onfi_params
config: i386-randconfig-s001-20210112 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-208-g46a52ca4-dirty
# https://github.com/Xilinx/linux-xlnx/commit/535b606b074de913935e28235504c248c657f9ea
git remote add xlnx https://github.com/Xilinx/linux-xlnx
git fetch --no-tags xlnx xlnx_rebase_v5.4
git checkout 535b606b074de913935e28235504c248c657f9ea
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
"sparse warnings: (new ones prefixed by >>)"
>> drivers/mtd/nand/raw/nand_onfi.c:297:26: sparse: sparse: cast to restricted __le16
vim +297 drivers/mtd/nand/raw/nand_onfi.c
136
137 /*
138 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
139 */
140 int nand_onfi_detect(struct nand_chip *chip)
141 {
142 struct mtd_info *mtd = nand_to_mtd(chip);
143 struct nand_memory_organization *memorg;
144 struct nand_onfi_params *p;
145 struct onfi_params *onfi;
146 int onfi_version = 0;
147 char id[4];
148 int i, ret, val;
149
150 memorg = nanddev_get_memorg(&chip->base);
151
152 /* Try ONFI for unknown chip or LP */
153 ret = nand_readid_op(chip, 0x20, id, sizeof(id));
154 if (ret || strncmp(id, "ONFI", 4))
155 return 0;
156
157 /* ONFI chip: allocate a buffer to hold its parameter page */
158 p = kzalloc((sizeof(*p) * 3), GFP_KERNEL);
159 if (!p)
160 return -ENOMEM;
161
162 ret = nand_read_param_page_op(chip, 0, NULL, 0);
163 if (ret) {
164 ret = 0;
165 goto free_onfi_param_page;
166 }
167
168 for (i = 0; i < 3; i++) {
169 ret = nand_read_data_op(chip, &p[i], sizeof(*p), true);
170 if (ret) {
171 ret = 0;
172 goto free_onfi_param_page;
173 }
174
175 if (onfi_crc16(ONFI_CRC_BASE, (u8 *)&p[i], 254) ==
176 le16_to_cpu(p->crc)) {
177 if (i)
178 memcpy(p, &p[i], sizeof(*p));
179 break;
180 }
181 }
182
183 if (i == 3) {
184 const void *srcbufs[3] = {p, p + 1, p + 2};
185
186 pr_warn("Could not find a valid ONFI parameter page, trying bit-wise majority to recover it\n");
187 nand_bit_wise_majority(srcbufs, ARRAY_SIZE(srcbufs), p,
188 sizeof(*p));
189
190 if (onfi_crc16(ONFI_CRC_BASE, (u8 *)p, 254) !=
191 le16_to_cpu(p->crc)) {
192 pr_err("ONFI parameter recovery failed, aborting\n");
193 goto free_onfi_param_page;
194 }
195 }
196
197 if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&
198 chip->manufacturer.desc->ops->fixup_onfi_param_page)
199 chip->manufacturer.desc->ops->fixup_onfi_param_page(chip, p);
200
201 /* Check version */
202 val = le16_to_cpu(p->revision);
203 if (val & ONFI_VERSION_2_3)
204 onfi_version = 23;
205 else if (val & ONFI_VERSION_2_2)
206 onfi_version = 22;
207 else if (val & ONFI_VERSION_2_1)
208 onfi_version = 21;
209 else if (val & ONFI_VERSION_2_0)
210 onfi_version = 20;
211 else if (val & ONFI_VERSION_1_0)
212 onfi_version = 10;
213
214 if (!onfi_version) {
215 pr_info("unsupported ONFI version: %d\n", val);
216 goto free_onfi_param_page;
217 }
218
219 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
220 sanitize_string(p->model, sizeof(p->model));
221 chip->parameters.model = kstrdup(p->model, GFP_KERNEL);
222 if (!chip->parameters.model) {
223 ret = -ENOMEM;
224 goto free_onfi_param_page;
225 }
226
227 memorg->pagesize = le32_to_cpu(p->byte_per_page);
228 mtd->writesize = memorg->pagesize;
229
230 /*
231 * pages_per_block and blocks_per_lun may not be a power-of-2 size
232 * (don't ask me who thought of this...). MTD assumes that these
233 * dimensions will be power-of-2, so just truncate the remaining area.
234 */
235 memorg->pages_per_eraseblock =
236 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
237 mtd->erasesize = memorg->pages_per_eraseblock * memorg->pagesize;
238
239 memorg->oobsize = le16_to_cpu(p->spare_bytes_per_page);
240 mtd->oobsize = memorg->oobsize;
241
242 memorg->luns_per_target = p->lun_count;
243 memorg->planes_per_lun = 1 << p->interleaved_bits;
244
245 /* See erasesize comment */
246 memorg->eraseblocks_per_lun =
247 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
248 memorg->max_bad_eraseblocks_per_lun = le32_to_cpu(p->blocks_per_lun);
249 memorg->bits_per_cell = p->bits_per_cell;
250
251 if (le16_to_cpu(p->features) & ONFI_FEATURE_16_BIT_BUS)
252 chip->options |= NAND_BUSWIDTH_16;
253
254 if (p->ecc_bits != 0xff) {
255 chip->base.eccreq.strength = p->ecc_bits;
256 chip->base.eccreq.step_size = 512;
257 } else if (onfi_version >= 21 &&
258 (le16_to_cpu(p->features) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
259
260 /*
261 * The nand_flash_detect_ext_param_page() uses the
262 * Change Read Column command which maybe not supported
263 * by the chip->legacy.cmdfunc. So try to update the
264 * chip->legacy.cmdfunc now. We do not replace user supplied
265 * command function.
266 */
267 nand_legacy_adjust_cmdfunc(chip);
268
269 /* The Extended Parameter Page is supported since ONFI 2.1. */
270 if (nand_flash_detect_ext_param_page(chip, p))
271 pr_warn("Failed to detect ONFI extended param page\n");
272 } else {
273 pr_warn("Could not retrieve ONFI ECC requirements\n");
274 }
275
276 /* Save some parameters from the parameter page for future use */
277 if (le16_to_cpu(p->opt_cmd) & ONFI_OPT_CMD_SET_GET_FEATURES) {
278 chip->parameters.supports_set_get_features = true;
279 bitmap_set(chip->parameters.get_feature_list,
280 ONFI_FEATURE_ADDR_TIMING_MODE, 1);
281 bitmap_set(chip->parameters.set_feature_list,
282 ONFI_FEATURE_ADDR_TIMING_MODE, 1);
283 }
284
285 onfi = kzalloc(sizeof(*onfi), GFP_KERNEL);
286 if (!onfi) {
287 ret = -ENOMEM;
288 goto free_model;
289 }
290
291 onfi->version = onfi_version;
292 onfi->tPROG = le16_to_cpu(p->t_prog);
293 onfi->tBERS = le16_to_cpu(p->t_bers);
294 onfi->tR = le16_to_cpu(p->t_r);
295 onfi->tCCS = le16_to_cpu(p->t_ccs);
296 onfi->async_timing_mode = le16_to_cpu(p->async_timing_mode);
> 297 onfi->jedec_id = le16_to_cpu(p->jedec_id);
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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