[arm:cex7 47/68] drivers/ata/ahci_qoriq.c:224:17: sparse: sparse: incorrect type in argument 1 (different address spaces)

kernel test robot lkp at intel.com
Sun Jan 10 15:18:55 EST 2021


tree:   git://git.armlinux.org.uk/~rmk/linux-arm.git cex7
head:   1b61ddd350658ee9d202584c4c9b67bd2f34a452
commit: 6f39faaa6225e3310788abf99a01ff1dd7353c54 [47/68] ahci: qoriq: workaround for errata A-379364 on lx2160a
config: openrisc-randconfig-s031-20210110 (attached as .config)
compiler: or1k-linux-gcc (GCC) 9.3.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.3-208-g46a52ca4-dirty
        git remote add arm git://git.armlinux.org.uk/~rmk/linux-arm.git
        git fetch --no-tags arm cex7
        git checkout 6f39faaa6225e3310788abf99a01ff1dd7353c54
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=openrisc 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>


"sparse warnings: (new ones prefixed by >>)"
>> drivers/ata/ahci_qoriq.c:224:17: sparse: sparse: incorrect type in argument 1 (different address spaces) @@     expected void *addr @@     got void [noderef] __iomem *[assigned] rcw_base @@
   drivers/ata/ahci_qoriq.c:224:17: sparse:     expected void *addr
   drivers/ata/ahci_qoriq.c:224:17: sparse:     got void [noderef] __iomem *[assigned] rcw_base
>> drivers/ata/ahci_qoriq.c:226:17: sparse: sparse: incorrect type in argument 1 (different address spaces) @@     expected void *addr @@     got void [noderef] __iomem *[assigned] serdes_base @@
   drivers/ata/ahci_qoriq.c:226:17: sparse:     expected void *addr
   drivers/ata/ahci_qoriq.c:226:17: sparse:     got void [noderef] __iomem *[assigned] serdes_base
>> drivers/ata/ahci_qoriq.c:228:17: sparse: sparse: incorrect type in argument 1 (different address spaces) @@     expected void *addr @@     got void [noderef] __iomem *[assigned] dev_con_base @@
   drivers/ata/ahci_qoriq.c:228:17: sparse:     expected void *addr
   drivers/ata/ahci_qoriq.c:228:17: sparse:     got void [noderef] __iomem *[assigned] dev_con_base
   drivers/ata/ahci_qoriq.c:311:9: sparse: sparse: Initializer entry defined twice
   drivers/ata/ahci_qoriq.c:311:9: sparse:   also defined here

vim +224 drivers/ata/ahci_qoriq.c

   110	
   111	static void fsl_sata_errata_379364(bool select)
   112	{
   113		int val = 0;
   114		void __iomem *rcw_base = NULL;
   115		void __iomem *serdes_base = NULL;
   116		void __iomem *dev_con_base = NULL;
   117	
   118		if (select) {
   119			dev_con_base = ioremap(DEVICE_CONFIG_REG_BASE, PAGE_SIZE);
   120			if (!dev_con_base)
   121				return;
   122	
   123			val = (readl(dev_con_base + SYS_VER_REG) & GENMASK(7, 4)) >> 4;
   124			if (val != LX2160A_VER1)
   125				goto dev_unmap;
   126	
   127			/*
   128			 * Add few msec delay.
   129			 * Check for corresponding serdes lane RST_DONE .
   130			 * apply lane reset.
   131			 */
   132	
   133			serdes_base = ioremap(SERDES2_BASE, PAGE_SIZE);
   134			if (!serdes_base)
   135				goto dev_unmap;
   136	
   137			rcw_base = ioremap(RCWSR29_BASE, PAGE_SIZE);
   138			if (!rcw_base)
   139				goto serdes_unmap;
   140	
   141			msleep(20);
   142	
   143			val = (readl(rcw_base) & GENMASK(25, 21)) >> 21;
   144	
   145			switch (val) {
   146			case 1:
   147				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAC)) &
   148					LN_RX_MASK) != LN_RX_RST_DONE)
   149					writel(LN_RX_RST, serdes_base +
   150						SERDES2_LNAX_RX_CR(SERDES2_LNAC));
   151				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAD)) &
   152					LN_RX_MASK) != LN_RX_RST_DONE)
   153					writel(LN_RX_RST, serdes_base +
   154						SERDES2_LNAX_RX_CR(SERDES2_LNAD));
   155				break;
   156	
   157			case 4:
   158				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAG)) &
   159					LN_RX_MASK) != LN_RX_RST_DONE)
   160					writel(LN_RX_RST, serdes_base +
   161						SERDES2_LNAX_RX_CR(SERDES2_LNAG));
   162				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAH)) &
   163					LN_RX_MASK) != LN_RX_RST_DONE)
   164					writel(LN_RX_RST, serdes_base +
   165						SERDES2_LNAX_RX_CR(SERDES2_LNAH));
   166				break;
   167	
   168			case 5:
   169				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAE)) &
   170					LN_RX_MASK) != LN_RX_RST_DONE)
   171					writel(LN_RX_RST, serdes_base +
   172						SERDES2_LNAX_RX_CR(SERDES2_LNAE));
   173				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAF)) &
   174					LN_RX_MASK) != LN_RX_RST_DONE)
   175					writel(LN_RX_RST, serdes_base +
   176						SERDES2_LNAX_RX_CR(SERDES2_LNAF));
   177				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAG)) &
   178					LN_RX_MASK) != LN_RX_RST_DONE)
   179					writel(LN_RX_RST, serdes_base +
   180						SERDES2_LNAX_RX_CR(SERDES2_LNAG));
   181				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAH)) &
   182					LN_RX_MASK) != LN_RX_RST_DONE)
   183					writel(LN_RX_RST, serdes_base +
   184						SERDES2_LNAX_RX_CR(SERDES2_LNAH));
   185				break;
   186	
   187			case 8:
   188				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAC)) &
   189					LN_RX_MASK) != LN_RX_RST_DONE)
   190					writel(LN_RX_RST, serdes_base +
   191						SERDES2_LNAX_RX_CR(SERDES2_LNAC));
   192				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAD)) &
   193					LN_RX_MASK) != LN_RX_RST_DONE)
   194					writel(LN_RX_RST, serdes_base +
   195						SERDES2_LNAX_RX_CR(SERDES2_LNAD));
   196				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAE)) &
   197					LN_RX_MASK) != LN_RX_RST_DONE)
   198					writel(LN_RX_RST, serdes_base +
   199						SERDES2_LNAX_RX_CR(SERDES2_LNAE));
   200				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAF)) &
   201					LN_RX_MASK) != LN_RX_RST_DONE)
   202					writel(LN_RX_RST, serdes_base +
   203						SERDES2_LNAX_RX_CR(SERDES2_LNAF));
   204				break;
   205	
   206			case 12:
   207				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAG)) &
   208					LN_RX_MASK) != LN_RX_RST_DONE)
   209					writel(LN_RX_RST, serdes_base +
   210						SERDES2_LNAX_RX_CR(SERDES2_LNAG));
   211				if ((readl(serdes_base + SERDES2_LNAX_RX_CBR(SERDES2_LNAH)) &
   212					LN_RX_MASK) != LN_RX_RST_DONE)
   213					writel(LN_RX_RST, serdes_base +
   214						SERDES2_LNAX_RX_CR(SERDES2_LNAH));
   215				break;
   216	
   217			default:
   218				break;
   219			}
   220		} else {
   221			return;
   222		}
   223	
 > 224		iounmap(rcw_base);
   225	serdes_unmap:
 > 226		iounmap(serdes_base);
   227	dev_unmap:
 > 228		iounmap(dev_con_base);
   229	}
   230	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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