[PATCH] arm64: Move PSTATE.TCO setting to separate functions

[Mark Rutland]

On Mon, Jan 04, 2021 at 12:47:15PM +0000, Catalin Marinas wrote:
> For consistency with __uaccess_{disable,enable}_hw_pan(), move the
> PSTATE.TCO setting into dedicated __uaccess_{disable,enable}_tco()
> functions.
> 
> Signed-off-by: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Vincenzo Frascino <vincenzo.frascino at arm.com>
> Cc: Mark Rutland <mark.rutland at arm.com>

Acked-by: Mark Rutland <mark.rutland at arm.com>

Mark.

> ---
>  arch/arm64/include/asm/uaccess.h | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
> index 6f986e09a781..534a7d33b12f 100644
> --- a/arch/arm64/include/asm/uaccess.h
> +++ b/arch/arm64/include/asm/uaccess.h
> @@ -159,6 +159,18 @@ static inline void __uaccess_enable_hw_pan(void)
>  			CONFIG_ARM64_PAN));
>  }
>  
> +static inline void __uaccess_disable_tco(void)
> +{
> +	asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0),
> +				 ARM64_MTE, CONFIG_KASAN_HW_TAGS));
> +}
> +
> +static inline void __uaccess_enable_tco(void)
> +{
> +	asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1),
> +				 ARM64_MTE, CONFIG_KASAN_HW_TAGS));
> +}
> +
>  /*
>   * The Tag Check Flag (TCF) mode for MTE is per EL, hence TCF0
>   * affects EL0 and TCF affects EL1 irrespective of which TTBR is
> @@ -178,8 +190,7 @@ static inline void __uaccess_enable_hw_pan(void)
>   */
>  static inline void uaccess_disable_privileged(void)
>  {
> -	asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0),
> -				 ARM64_MTE, CONFIG_KASAN_HW_TAGS));
> +	__uaccess_disable_tco();
>  
>  	if (uaccess_ttbr0_disable())
>  		return;
> @@ -189,8 +200,7 @@ static inline void uaccess_disable_privileged(void)
>  
>  static inline void uaccess_enable_privileged(void)
>  {
> -	asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1),
> -				 ARM64_MTE, CONFIG_KASAN_HW_TAGS));
> +	__uaccess_enable_tco();
>  
>  	if (uaccess_ttbr0_enable())
>  		return;