[PATCH v2 00/15] soc: xilinx: vcu: Convert driver to clock provider

[Michal Simek]

Hi,

On 21. 12. 20 16:06, Michael Tretter wrote:
> Hello,
> 
> the xlnx_vcu soc driver is actually a clock provider of a PLL and four output
> clocks created from the PLL via dividers.
> 
> This is v2 of the series to transform the driver into a proper clock provider
> driver.
> 
> The main changes compared to v1 are:
> 
> Get rid of the "dummy" clock and remove the manual switching of the mux in the
> output clocks. The driver now uses the pll_ref as a bypass clock. As this is
> not documented, I am not sure if this is actually the case, but without
> another signal for an external clock to the ip core, this seems plausible and
> avoids changes to the device tree binding. The reparenting happens
> automatically when setting a rate on the output clocks.
> 
> Add a few patches to cleanup checkpatch warnings on the driver itself.
> 
> Move the entire driver from drivers/soc to drivers/clk, because the driver is
> now actually only clock provider driver.
> 
> A more detailed changelog is attached to the respective patches.
> 
> The series is based on the zynqmp/soc-next branch in the Xilinx downstream
> repository [0] which should be merged to mainline soon.
> 
> Michael
> 
> [0] https://github.com/Xilinx/linux-xlnx/tree/zynqmp/soc-next

Series looks good to me but not clock expert.

Stephen: Please let me know if you want me to take it via my tree.
If yes please ack that 15/15.

For the whole series please add
Acked-by: Michal Simek <michal.simek at xilinx.com>
when that minor kerneldoc issue in 9/15 is fixed.

Thanks,
Michal