[PATCH v12 10/10] iommu/arm-smmu-v3: Add stall support for platform devices
wangzhou1 at hisilicon.com
Fri Feb 26 04:43:27 EST 2021
On 2021/2/1 19:14, Jean-Philippe Brucker wrote:
> Hi Zhou,
> On Mon, Feb 01, 2021 at 09:18:42AM +0800, Zhou Wang wrote:
>>> @@ -1033,8 +1076,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid,
>>> FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) |
>>> - /* STALL_MODEL==0b10 && CD.S==0 is ILLEGAL */
>>> - if (smmu->features & ARM_SMMU_FEAT_STALL_FORCE)
>>> + if (smmu_domain->stall_enabled)
>> Could we add ssid checking here? like: if (smmu_domain->stall_enabled && ssid).
>> The reason is if not CD.S will also be set when ssid is 0, which is not needed.
> Some drivers may want to get stall events on SSID 0:
> Are you seeing an issue with stall events on ssid 0? Normally there
> shouldn't be any fault on this context, but if they happen and no handler
> is registered, the SMMU driver will just abort them and report them like a
> non-stall event.
I notice that there is problem. In my case, I expect that CD0 is for kernel
and other CDs are for user space. Normally there shouldn't be any fault in
kernel, however, we have RAS case which is for some reason there may has
invalid address access from hardware device.
So at least there are two different address access failures: 1. hardware RAS problem;
2. software fault fail(e.g. kill process when doing DMA). Handlings for these
two are different: for 1, we should reset hardware device; for 2, stop related
DMA is enough.
Currently if SMMU returns the same signal(by SMMU resume abort), master device
driver can not tell these two kinds of cases.
>From the basic concept, if a CD is used for kernel, its S bit should not be set.
How about we add iommu domain check here too, if DMA domain we do not set S bit for
CD0, if unmanaged domain we set S bit for all CDs?
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