[PATCH v2 06/10] arm64: dts: lx2160a: add pcie EP mode nodes

Shawn Guo shawnguo at kernel.org
Mon Dec 13 21:40:45 PST 2021


On Fri, Dec 03, 2021 at 05:54:42PM -0600, Li Yang wrote:
> From: Xiaowei Bao <xiaowei.bao at nxp.com>
> 
> The LX2160A PCIe EP mode nodes based on controller used on lx2160a rev2.
> 
> Signed-off-by: Xiaowei Bao <xiaowei.bao at nxp.com>
> Signed-off-by: Li Yang <leoyang.li at nxp.com>
> Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> ---
>  .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 60 +++++++++++++++++++
>  1 file changed, 60 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index de680521e1d1..593c5a498ae3 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -1115,6 +1115,16 @@ pcie1: pcie at 3400000 {
>  			status = "disabled";
>  		};
>  
> +		pcie_ep1: pcie_ep at 3400000 {

Hyphen is more recommended than underscore for node name.

Shawn

> +			compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep";
> +			reg = <0x00 0x03400000 0x0 0x00100000
> +			       0x80 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ob-windows = <8>;
> +			num-ib-windows = <8>;
> +			status = "disabled";
> +		};
> +
>  		pcie2: pcie at 3500000 {
>  			compatible = "fsl,ls2088a-pcie";
>  			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
> @@ -1143,6 +1153,16 @@ pcie2: pcie at 3500000 {
>  			status = "disabled";
>  		};
>  
> +		pcie_ep2: pcie_ep at 3500000 {
> +			compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep";
> +			reg = <0x00 0x03500000 0x0 0x00100000
> +			       0x88 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ob-windows = <8>;
> +			num-ib-windows = <8>;
> +			status = "disabled";
> +		};
> +
>  		pcie3: pcie at 3600000 {
>  			compatible = "fsl,ls2088a-pcie";
>  			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
> @@ -1171,6 +1191,16 @@ pcie3: pcie at 3600000 {
>  			status = "disabled";
>  		};
>  
> +		pcie_ep3: pcie_ep at 3600000 {
> +			compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep";
> +			reg = <0x00 0x03600000 0x0 0x00100000
> +			       0x90 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ob-windows = <256>;
> +			num-ib-windows = <24>;
> +			status = "disabled";
> +		};
> +
>  		pcie4: pcie at 3700000 {
>  			compatible = "fsl,ls2088a-pcie";
>  			reg = <0x00 0x03700000 0x0 0x00100000   /* controller registers */
> @@ -1199,6 +1229,16 @@ pcie4: pcie at 3700000 {
>  			status = "disabled";
>  		};
>  
> +		pcie_ep4: pcie_ep at 3700000 {
> +			compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep";
> +			reg = <0x00 0x03700000 0x0 0x00100000
> +			       0x98 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ob-windows = <8>;
> +			num-ib-windows = <8>;
> +			status = "disabled";
> +		};
> +
>  		pcie5: pcie at 3800000 {
>  			compatible = "fsl,ls2088a-pcie";
>  			reg = <0x00 0x03800000 0x0 0x00100000   /* controller registers */
> @@ -1227,6 +1267,16 @@ pcie5: pcie at 3800000 {
>  			status = "disabled";
>  		};
>  
> +		pcie_ep5: pcie_ep at 3800000 {
> +			compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep";
> +			reg = <0x00 0x03800000 0x0 0x00100000
> +			       0xa0 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ob-windows = <256>;
> +			num-ib-windows = <24>;
> +			status = "disabled";
> +		};
> +
>  		pcie6: pcie at 3900000 {
>  			compatible = "fsl,ls2088a-pcie";
>  			reg = <0x00 0x03900000 0x0 0x00100000   /* controller registers */
> @@ -1255,6 +1305,16 @@ pcie6: pcie at 3900000 {
>  			status = "disabled";
>  		};
>  
> +		pcie_ep6: pcie_ep at 3900000 {
> +			compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep";
> +			reg = <0x00 0x03900000 0x0 0x00100000
> +			       0xa8 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ob-windows = <8>;
> +			num-ib-windows = <8>;
> +			status = "disabled";
> +		};
> +
>  		smmu: iommu at 5000000 {
>  			compatible = "arm,mmu-500";
>  			reg = <0 0x5000000 0 0x800000>;
> -- 
> 2.25.1
> 



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