[PATCH v2 00/18] i.MX8MM GPC improvements and BLK_CTRL driver

[Peng Fan (OSS)]

> Subject: [PATCH v2 00/18] i.MX8MM GPC improvements and BLK_CTRL driver
> 
> Hi all,
> 
> second revision of the GPC improvements and BLK_CTRL driver to make use
> of all the power-domains on the i.MX8MM. I'm not going to repeat the full
> blurb from the v1 cover letter here, but if you are not familiar with i.MX8MM
> power domains, it may be worth a read.
> 
> This 2nd revision fixes the DT bindings to be valid yaml, some small failure
> path issues and most importantly the interaction with system
> suspend/resume. With the previous version some of the power domains
> would not come up correctly after a suspend/resume cycle.

Thanks for the work. I gave a test, boot and suspend/resume work with display.

Tested-by: Peng Fan <peng.fan at nxp.com>

> 
> Updated testing git trees here, disclaimer still applies:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.pen
> gutronix.de%2Fcgit%2Flst%2Flinux%2Flog%2F%3Fh%3Dimx8m-power-domai
> ns&data=04%7C01%7Cpeng.fan%40nxp.com%7C3ef1698b8c53454da41
> 808d94c88b577%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 7624972323848567%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMD
> AiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata
> =PbhVVIqDcUMtMmurwpp2PoSYaAzXgRKVvBccd%2BL26oc%3D&reserv
> ed=0
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.pen
> gutronix.de%2Fcgit%2Flst%2Flinux%2Flog%2F%3Fh%3Dimx8m-power-domai
> ns-testing&data=04%7C01%7Cpeng.fan%40nxp.com%7C3ef1698b8c534
> 54da41808d94c88b577%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C
> 0%7C637624972323848567%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4w
> LjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&a
> mp;sdata=rAuBbsQ5%2FpZJhuocWmapgNwERxat0IQsRfBiQpeJzuk%3D&
> reserved=0
> 
> Regards,
> Lucas
> 
> Frieder Schrempf (1):
>   arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core
> 
> Lucas Stach (15):
>   Revert "soc: imx: gpcv2: move reset assert after requesting domain
>     power up"
>   soc: imx: gpcv2: add lockdep annotation
>   soc: imx: gpcv2: add domain option to keep domain clocks enabled
>   soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
>   soc: imx: gpcv2: support system suspend/resume
>   dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl
>   dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains
>   soc: imx: add i.MX8M blk-ctrl driver
>   dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl
>   dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains
>   soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl
>   arm64: dts: imx8mm: add GPC node
>   arm64: dts: imx8mm: put USB controllers into power-domains
>   arm64: dts: imx8mm: add VPU blk-ctrl
>   arm64: dts: imx8mm: add DISP blk-ctrl
> 
> Marek Vasut (2):
>   soc: imx: gpcv2: Turn domain->pgc into bitfield
>   soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM
> GPU
>     domain
> 
>  .../soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml     |  94 ++++
>  .../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml      |  76 +++
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi     | 180 ++++++
>  drivers/soc/imx/Makefile                      |   1 +
>  drivers/soc/imx/gpcv2.c                       | 130 +++--
>  drivers/soc/imx/imx8m-blk-ctrl.c              | 525
> ++++++++++++++++++
>  include/dt-bindings/power/imx8mm-power.h      |   9 +
>  7 files changed, 974 insertions(+), 41 deletions(-)  create mode 100644
> Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml
>  create mode 100644
> Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
>  create mode 100644 drivers/soc/imx/imx8m-blk-ctrl.c
> 
> --
> 2.30.2