[kbuild] Re: [PATCH] dmaengine: xilinx: dpdma: request_irq after initializing dma channels

Dan Carpenter dan.carpenter at oracle.com
Thu Apr 29 14:03:58 BST 2021


Hi,

url:    https://github.com/0day-ci/linux/commits/quanyang-wang-windriver-com/dmaengine-xilinx-dpdma-request_irq-after-initializing-dma-channels/20210429-150050 
base:   https://github.com/Xilinx/linux-xlnx  master
config: x86_64-randconfig-m001-20210429 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
Reported-by: Dan Carpenter <dan.carpenter at oracle.com>

smatch warnings:
drivers/dma/xilinx/xilinx_dpdma.c:1778 xilinx_dpdma_probe() warn: missing error code 'ret'

vim +/ret +1778 drivers/dma/xilinx/xilinx_dpdma.c

7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1694  static int xilinx_dpdma_probe(struct platform_device *pdev)
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1695  {
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1696  	struct xilinx_dpdma_device *xdev;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1697  	struct dma_device *ddev;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1698  	unsigned int i;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1699  	int ret;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1700  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1701  	xdev = devm_kzalloc(&pdev->dev, sizeof(*xdev), GFP_KERNEL);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1702  	if (!xdev)
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1703  		return -ENOMEM;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1704  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1705  	xdev->dev = &pdev->dev;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1706  	xdev->ext_addr = sizeof(dma_addr_t) > 4;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1707  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1708  	INIT_LIST_HEAD(&xdev->common.channels);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1709  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1710  	platform_set_drvdata(pdev, xdev);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1711  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1712  	xdev->axi_clk = devm_clk_get(xdev->dev, "axi_clk");
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1713  	if (IS_ERR(xdev->axi_clk))
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1714  		return PTR_ERR(xdev->axi_clk);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1715  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1716  	xdev->reg = devm_platform_ioremap_resource(pdev, 0);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1717  	if (IS_ERR(xdev->reg))
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1718  		return PTR_ERR(xdev->reg);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1719  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1720  	ddev = &xdev->common;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1721  	ddev->dev = &pdev->dev;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1722  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1723  	dma_cap_set(DMA_SLAVE, ddev->cap_mask);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1724  	dma_cap_set(DMA_PRIVATE, ddev->cap_mask);
b305dd098dae4f Rohit Visavalia  2021-04-07  1725  	dma_cap_set(DMA_CYCLIC, ddev->cap_mask);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1726  	dma_cap_set(DMA_INTERLEAVE, ddev->cap_mask);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1727  	dma_cap_set(DMA_REPEAT, ddev->cap_mask);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1728  	dma_cap_set(DMA_LOAD_EOT, ddev->cap_mask);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1729  	ddev->copy_align = fls(XILINX_DPDMA_ALIGN_BYTES - 1);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1730  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1731  	ddev->device_alloc_chan_resources = xilinx_dpdma_alloc_chan_resources;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1732  	ddev->device_free_chan_resources = xilinx_dpdma_free_chan_resources;
b305dd098dae4f Rohit Visavalia  2021-04-07  1733  	ddev->device_prep_dma_cyclic = xilinx_dpdma_prep_dma_cyclic;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1734  	ddev->device_prep_interleaved_dma = xilinx_dpdma_prep_interleaved_dma;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1735  	/* TODO: Can we achieve better granularity ? */
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1736  	ddev->device_tx_status = dma_cookie_status;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1737  	ddev->device_issue_pending = xilinx_dpdma_issue_pending;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1738  	ddev->device_config = xilinx_dpdma_config;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1739  	ddev->device_pause = xilinx_dpdma_pause;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1740  	ddev->device_resume = xilinx_dpdma_resume;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1741  	ddev->device_terminate_all = xilinx_dpdma_terminate_all;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1742  	ddev->device_synchronize = xilinx_dpdma_synchronize;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1743  	ddev->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1744  	ddev->directions = BIT(DMA_MEM_TO_DEV);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1745  	ddev->residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1746  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1747  	for (i = 0; i < ARRAY_SIZE(xdev->chan); ++i) {
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1748  		ret = xilinx_dpdma_chan_init(xdev, i);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1749  		if (ret < 0) {
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1750  			dev_err(xdev->dev, "failed to initialize channel %u\n",
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1751  				i);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1752  			goto error;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1753  		}
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1754  	}
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1755  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1756  	ret = clk_prepare_enable(xdev->axi_clk);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1757  	if (ret) {
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1758  		dev_err(xdev->dev, "failed to enable the axi clock\n");
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1759  		goto error;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1760  	}
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1761  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1762  	ret = dma_async_device_register(ddev);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1763  	if (ret) {
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1764  		dev_err(xdev->dev, "failed to register the dma device\n");
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1765  		goto error_dma_async;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1766  	}
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1767  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1768  	ret = of_dma_controller_register(xdev->dev->of_node,
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1769  					 of_dma_xilinx_xlate, ddev);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1770  	if (ret) {
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1771  		dev_err(xdev->dev, "failed to register DMA to DT DMA helper\n");
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1772  		goto error_of_dma;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1773  	}
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1774  
50d6be0a1d25af Quanyang Wang    2021-04-29  1775  	xdev->irq = platform_get_irq(pdev, 0);
50d6be0a1d25af Quanyang Wang    2021-04-29  1776  	if (xdev->irq < 0) {
50d6be0a1d25af Quanyang Wang    2021-04-29  1777  		dev_err(xdev->dev, "failed to get platform irq\n");
50d6be0a1d25af Quanyang Wang    2021-04-29 @1778  		goto error_irq;

ret = xdev->irq;

50d6be0a1d25af Quanyang Wang    2021-04-29  1779  	}
50d6be0a1d25af Quanyang Wang    2021-04-29  1780  
50d6be0a1d25af Quanyang Wang    2021-04-29  1781  	ret = request_irq(xdev->irq, xilinx_dpdma_irq_handler, IRQF_SHARED,
50d6be0a1d25af Quanyang Wang    2021-04-29  1782  			  dev_name(xdev->dev), xdev);
50d6be0a1d25af Quanyang Wang    2021-04-29  1783  	if (ret) {
50d6be0a1d25af Quanyang Wang    2021-04-29  1784  		dev_err(xdev->dev, "failed to request IRQ\n");
50d6be0a1d25af Quanyang Wang    2021-04-29  1785  		goto error_irq;
50d6be0a1d25af Quanyang Wang    2021-04-29  1786  	}
50d6be0a1d25af Quanyang Wang    2021-04-29  1787  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1788  	xilinx_dpdma_enable_irq(xdev);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1789  
1d220435cab3bf Laurent Pinchart 2020-08-12  1790  	xilinx_dpdma_debugfs_init(xdev);
1d220435cab3bf Laurent Pinchart 2020-08-12  1791  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1792  	dev_info(&pdev->dev, "Xilinx DPDMA engine is probed\n");
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1793  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1794  	return 0;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1795  
50d6be0a1d25af Quanyang Wang    2021-04-29  1796  error_irq:
50d6be0a1d25af Quanyang Wang    2021-04-29  1797  	of_dma_controller_free(pdev->dev.of_node);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1798  error_of_dma:
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1799  	dma_async_device_unregister(ddev);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1800  error_dma_async:
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1801  	clk_disable_unprepare(xdev->axi_clk);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1802  error:
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1803  	for (i = 0; i < ARRAY_SIZE(xdev->chan); i++)
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1804  		xilinx_dpdma_chan_remove(xdev->chan[i]);
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1805  
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1806  	return ret;
7cbb0c63de3fc2 Hyun Kwon        2020-07-17  1807  }

---
0-DAY CI Kernel Test Service, Intel Corporation
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