[RFC PATCH 1/2] ARM: mstar: Add header with macros for RIU register access

[Arnd Bergmann]

On Fri, Apr 23, 2021 at 4:03 PM Daniel Palmer <daniel at 0x0f.com> wrote:
> On Fri, 23 Apr 2021 at 22:48, Arnd Bergmann <arnd at kernel.org> wrote:
> >
> > The __iomem token comes after the type, so this should be 'void __iomem *'.
> >
>
> Bit of copy/paste fail. Fixed.
>
> > > +       return readw_relaxed(reg + 4) << 16 | readw_relaxed(reg);
> >
> > This should probably be using 'readw' instead of 'readw_relaxed'. If you
> > absolutely need to use one of the relaxed accessors somewhere,
> > better add both sets and make sure drivers use the non-relaxed version
> > by default.
>
> I'll add a relaxed/non-relaxed version of each.
> Because of the heavy memory barrier to access one 32 bit register
> we'll hit the barrier twice in the non-relaxed version.
> And we don't need to hit the barrier at all because it doesn't
> actually matter for IO. Is there something better I can do there?

I think you can do the heavy barrier only once in this case. For writel,
the barrier comes first, so you can do writel();write_relaxed(), and the
reverse for the read side, doing readl_relaxed(); readl();.

> > Maybe both types of accessors can be in a single header.
>
> That makes sense. I'll merge them. Would this header be something that
> could go in alone without anything that uses them in mainline right
> now?

I don't care much, I can provide an Acked-by for merging it along with
whatever driver change first needs it, or I can merge it after
5.13-rc1 through the soc tree.

          Arnd