[PATCH] arm64: dts: marvell: armada-37xx: Set linux, pci-domain to zero

[Rob Herring]

On Mon, Apr 12, 2021 at 7:41 AM Pali Rohár <pali at kernel.org> wrote:
>
> Since commit 526a76991b7b ("PCI: aardvark: Implement driver 'remove'
> function and allow to build it as module") PCIe controller driver for
> Armada 37xx can be dynamically loaded and unloaded at runtime. Also driver
> allows dynamic binding and unbinding of PCIe controller device.
>
> Kernel PCI subsystem assigns by default dynamically allocated PCI domain
> number (starting from zero) for this PCIe controller every time when device
> is bound. So PCI domain changes after every unbind / bind operation.

PCI host bridges as a module are relatively new, so seems likely a bug to me.

> Alternative way for assigning PCI domain number is to use static allocated
> numbers defined in Device Tree. This option has requirement that every PCI
> controller in system must have defined PCI bus number in Device Tree.

That seems entirely pointless from a DT point of view with a single PCI bridge.

> Armada 37xx has only one PCIe controller, so assign for it PCI domain 0 in
> Device Tree.
>
> After this change PCI domain on Armada 37xx is always zero, even after
> repeated unbind and bind operations.
>
> Signed-off-by: Pali Rohár <pali at kernel.org>
> Fixes: 526a76991b7b ("PCI: aardvark: Implement driver 'remove' function and allow to build it as module")
> ---
>  arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index 7a2df148c6a3..f02058ef5364 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -495,6 +495,7 @@
>                                         <0 0 0 2 &pcie_intc 1>,
>                                         <0 0 0 3 &pcie_intc 2>,
>                                         <0 0 0 4 &pcie_intc 3>;
> +                       linux,pci-domain = <0>;
>                         max-link-speed = <2>;
>                         phys = <&comphy1 0>;
>                         pcie_intc: interrupt-controller {
> --
> 2.20.1
>