[PATCH 0/2] Enable support IPI_CPU_CRASH_STOP to be pseudo-NMI

ito-yuichi at fujitsu.com ito-yuichi at fujitsu.com
Wed Sep 30 04:51:54 EDT 2020


Hi Marc

> 
> On 2020-09-29 06:50, ito-yuichi at fujitsu.com wrote:
> > Hi Marc
> 
> [...]
> 
> >> >> The patch has been tested on ThunderX.
> >>
> >> Which ThunderX? TX2 (at least the incarnation I used in the past)
> >> wasn't able
> >> to correctly deal with priorities.
> >
> > I tried it with ThunderX CN8890.
> > If you tell me steps to reproduce the problem of TX2, I will
> > investigate it with TX as well.
> 
> PMR_EL1 reporting fantasy values, non-uniform priority support across
> the interrupt classes, and generally prone to lockups. The original TX
> is a very different machine though (TX 1 and 2 only share the engraving
> of the manufacturer on the heat-spreader).

Thank you for the information.
I will check if we have a ThunderX1 or X2 environment. If we have either one, I will investigate it.

>          M.
> --
> Jazz is not dead. It just smells funny...


Thank you and best regards,

Yuichi Ito



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