[PATCH] PCI: imx6: Select correct clock source for MX7D PCIe PHY

[Marek Vasut]

On 9/27/20 4:13 AM, Richard Zhu wrote:

[...]

Hi,

>> The internal PCIe PHY clock source cannot lock the PLL, use the external pad one
>> just like iMX8MQ does, which is very similar SoC in this area.
>>
> [Richard Zhu] Hi Marek:
> Do you know why PCIe PHY clock can't be locked when internal PLL is used as PCIe REF CLK?
> As I know that the PCIe PHY clock can be locked on iMX7D SDB board when internal PLL is selected.

I don't know, and I can't find any useful information which could
explain it either, nor why iMX8 does it differently (like this patch).
Maybe it is related to errata e10728 ?