RGMII timing calibration (on 12nm Amlogic SoCs) - integration into dwmac-meson8b
martin.blumenstingl at googlemail.com
Fri Sep 25 18:15:59 EDT 2020
On Sat, Sep 26, 2020 at 12:03 AM Vladimir Oltean <olteanv at gmail.com> wrote:
> > Any recommendations/suggestions/ideas/hints are welcome!
> > Thank you and best regards,
> > Martin
> >  https://github.com/khadas/u-boot/blob/4752efbb90b7d048a81760c67f8c826f14baf41c/drivers/net/designware.c#L707
> >  https://github.com/khadas/linux/blob/khadas-vims-4.9.y/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c#L466
> Florian attempted something like this before, for the PHY side of things:
thank you for this hint!
> There are quite some assumptions to be made if the code is to be made
> generic, such as the fact that the controller should not drop frames
> with bad FCS in hardware. Or if it does, the code should be aware of
> that and check that counter.
I do not need the auto-detection of the phy-mode nor any RX/TX delay
(these are fixed values)
however, from that patch-set I would need most of
phy_rgmii_probe_interface() (and all of the helpers it's using)
also I'm wondering if the "protocol" 0x0808 is recommended over ETH_P_EDSA
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