[PATCH v3 5/6] arm64: dtsi: imx8mp: add usb nodes

[Jun Li]

> -----Original Message-----
> From: Sascha Hauer <s.hauer at pengutronix.de>
> Sent: Wednesday, September 23, 2020 3:51 PM
> To: Jun Li <jun.li at nxp.com>
> Cc: robh+dt at kernel.org; shawnguo at kernel.org; balbi at kernel.org;
> mathias.nyman at intel.com; gregkh at linuxfoundation.org;
> kernel at pengutronix.de; festevam at gmail.com; dl-linux-imx
> <linux-imx at nxp.com>; Anson Huang <anson.huang at nxp.com>; Aisheng Dong
> <aisheng.dong at nxp.com>; Peng Fan <peng.fan at nxp.com>; Andy Duan
> <fugang.duan at nxp.com>; Joakim Zhang <qiangqing.zhang at nxp.com>; Horia
> Geanta <horia.geanta at nxp.com>; linux-usb at vger.kernel.org;
> devicetree at vger.kernel.org; linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH v3 5/6] arm64: dtsi: imx8mp: add usb nodes
> 
> On Tue, Sep 22, 2020 at 06:46:51PM +0800, Li Jun wrote:
> > imx8mp integrates 2 identical dwc3 based USB3 controllers and Synopsys
> > phys, each instance has additional wakeup logic to support low power
> > mode, so the glue layer need a node with dwc3 core sub node.
> >
> > Signed-off-by: Li Jun <jun.li at nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 88
> > +++++++++++++++++++++++++++++++
> >  1 file changed, 88 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 9de2aa1..1b7ed4c 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +		usb3_1: usb at 32f10108 {
> > +			compatible = "fsl,imx8mp-dwc3";
> > +			reg = <0x32f10108 0x8>;
> > +			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> > +				 <&clk IMX8MP_CLK_USB_ROOT>;
> > +			clock-names = "hsio", "suspend";
> > +			assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI_SRC>;
> 
> In Linux-5.9-rc6 this clock doesn't exist anymore. Should be
> IMX8MP_CLK_HSIO_AXI

Will change.

> 
> > +			assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> > +			assigned-clock-rates = <500000000>;
> > +			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges;
> > +			status = "disabled";
> > +
> > +			usb_dwc3_1: dwc3 at 38200000 {
> > +				compatible = "snps,dwc3";
> > +				reg = <0x38200000 0x10000>;
> > +				clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
> > +					 <&clk IMX8MP_CLK_USB_CORE_REF>,
> > +					 <&clk IMX8MP_CLK_USB_ROOT>;
> > +				clock-names = "bus_early", "ref", "suspend";
> > +				assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
> > +				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> > +				assigned-clock-rates = <500000000>;
> > +				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> > +				phys = <&usb3_phy1>, <&usb3_phy1>;
> > +				phy-names = "usb2-phy", "usb3-phy";
> > +				snps,dis-u2-freeclk-exists-quirk;
> > +				xhci-64bit-support-disable;
> > +				status = "disabled";
> 
> Does it make sense for a board to enable the parent node and leave this one
> disabled? If not you can drop this status = "disabled" here.

OK, will drop it.

Thanks
Li Jun
> 
> Sascha
> 
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