[PATCH 11/19] coresight: etm4x: Check for OS and Software Lock

[Suzuki K Poulose]

On 09/18/2020 04:35 PM, Mike Leach wrote:
> Hi Suzuki
> 
> On Fri, 11 Sep 2020 at 09:41, Suzuki K Poulose <suzuki.poulose at arm.com> wrote:
>>
>> An ETM instance may not implement the OS/Software Lock. This
>> is advertised via TRCOSLSR/TRCLSR respectively. Detect the
>> presence of these lock registers and skip the lock/unlock
>> if they are not implemented.
>>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose at arm.com>
>> ---
>>   drivers/hwtracing/coresight/coresight-etm4x.c | 77 +++++++++++++++----
>>   drivers/hwtracing/coresight/coresight-etm4x.h | 24 +++++-
>>   2 files changed, 83 insertions(+), 18 deletions(-)
>>


>>
>> +/*
>> + * ETM may or may not implement the Software Lock and the OS Lock.
>> + * Detect this before we attempt to do any locking.
>> + */
>> +static void etm_detect_lock_status(struct etmv4_drvdata *drvdata,
>> +                                  struct csdev_access *csa)
>> +{
>> +       u32 sw_lsr = etm4x_relaxed_read32(csa, TRCLSR);
> 
> 7.3.48 - ETMv4.5 spec -> TRCLSR accessible only from the memory mapped
> interface.
> 

Good point, I have fixed this now.

>> +       u32 os_lsr = etm4x_relaxed_read32(csa, TRCOSLSR);
> 
> This is unneeded. 7.3.50 of the ETM4.5 spec says for OS lock bits
> "always 0b10 for Armv8-A/R, Armv7-A/R,". So always implemented.

Agreed, I will drop this for now.

Cheers
Suzuki