[PATCH v2 01/10] ARM: p2v: fix handling of LPAE translation in BE mode
Russell King - ARM Linux admin
linux at armlinux.org.uk
Mon Sep 21 18:18:28 EDT 2020
On Mon, Sep 21, 2020 at 05:41:08PM +0200, Ard Biesheuvel wrote:
> When running in BE mode on LPAE hardware with a PA-to-VA translation
> that exceeds 4 GB, we patch bits 39:32 of the offset into the wrong
> byte of the opcode. So fix that, by rotating the offset in r0 to the
> right by 8 bits, which will put the 8-bit immediate in bits 31:24.
>
> Note that this will also move bit #22 in its correct place when
> applying the rotation to the constant #0x400000.
>
> Signed-off-by: Ard Biesheuvel <ardb at kernel.org>
Should this have a fixes tag?
> ---
> arch/arm/kernel/head.S | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
> index f8904227e7fd..98c1e68bdfcb 100644
> --- a/arch/arm/kernel/head.S
> +++ b/arch/arm/kernel/head.S
> @@ -671,12 +671,8 @@ ARM_BE8(rev16 ip, ip)
> ldrcc r7, [r4], #4 @ use branch for delay slot
> bcc 1b
> bx lr
> -#else
> -#ifdef CONFIG_CPU_ENDIAN_BE8
> - moveq r0, #0x00004000 @ set bit 22, mov to mvn instruction
> #else
> moveq r0, #0x400000 @ set bit 22, mov to mvn instruction
> -#endif
> b 2f
> 1: ldr ip, [r7, r3]
> #ifdef CONFIG_CPU_ENDIAN_BE8
> @@ -685,7 +681,7 @@ ARM_BE8(rev16 ip, ip)
> tst ip, #0x000f0000 @ check the rotation field
> orrne ip, ip, r6, lsl #24 @ mask in offset bits 31-24
> biceq ip, ip, #0x00004000 @ clear bit 22
> - orreq ip, ip, r0 @ mask in offset bits 7-0
> + orreq ip, ip, r0, ror #8 @ mask in offset bits 7-0
> #else
> bic ip, ip, #0x000000ff
> tst ip, #0xf00 @ check the rotation field
> --
> 2.17.1
>
>
--
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