[PATCH 19/30] iio: dac: ad5064: Fix a few kerneldoc misdemeanours

[Jonathan Cameron]

On Thu, 16 Jul 2020 14:59:17 +0100
Lee Jones <lee.jones at linaro.org> wrote:

> Misspelling, missing description and compiler attribute ordering.
> 
> Fixes the following W=1 kernel build warning(s):
> 
>  drivers/iio/dac/ad5064.c:71: warning: bad line:                         internal vref.
>  drivers/iio/dac/ad5064.c:83: warning: Function parameter or member 'channels' not described in 'ad5064_chip_info'
>  drivers/iio/dac/ad5064.c:125: warning: Function parameter or member 'lock' not described in 'ad5064_state'
>  drivers/iio/dac/ad5064.c:125: warning: Function parameter or member '____cacheline_aligned' not described in 'ad5064_state'
> 
> Cc: Michael Hennerich <Michael.Hennerich at analog.com>
> Cc: Liam Girdwood <lgirdwood at gmail.com>
> Cc: Mark Brown <broonie at kernel.org>
> Signed-off-by: Lee Jones <lee.jones at linaro.org>
Applied with the ___cacheline_aligned bit dropped as now kernel-doc won't
complain about that.

Thanks,

Jonathan

> ---
>  drivers/iio/dac/ad5064.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c
> index 303f6d1a5f311..d7109f8f52efa 100644
> --- a/drivers/iio/dac/ad5064.c
> +++ b/drivers/iio/dac/ad5064.c
> @@ -68,8 +68,8 @@ enum ad5064_regmap_type {
>   * struct ad5064_chip_info - chip specific information
>   * @shared_vref:	whether the vref supply is shared between channels
>   * @internal_vref:	internal reference voltage. 0 if the chip has no
> -			internal vref.
> - * @channel:		channel specification
> + *			internal vref.
> + * @channels:		channel specification
>   * @num_channels:	number of channels
>   * @regmap_type:	register map layout variant
>   */
> @@ -98,6 +98,7 @@ typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
>   * @use_internal_vref:	set to true if the internal reference voltage should be
>   *			used.
>   * @write:		register write callback
> + * @lock:		maintain consistency between cached and dev state
>   * @data:		i2c/spi transfer buffers
>   */
>  
> @@ -111,7 +112,6 @@ struct ad5064_state {
>  	bool				use_internal_vref;
>  
>  	ad5064_write_func		write;
> -	/* Lock used to maintain consistency between cached and dev state */
>  	struct mutex lock;
>  
>  	/*
> @@ -121,7 +121,7 @@ struct ad5064_state {
>  	union {
>  		u8 i2c[3];
>  		__be32 spi;
> -	} data ____cacheline_aligned;
> +	} ____cacheline_aligned data;
>  };
>  
>  enum ad5064_type {