[PATCH v2] clk: exynos7: Keep aclk_fsys1_200 enabled
Krzysztof Kozlowski
krzk at kernel.org
Sun Nov 8 13:41:15 EST 2020
On Sat, Nov 07, 2020 at 01:14:56PM +0100, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), fix this by calling
> clk_prepare_enable() directly from clock provider driver.
>
> It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
> UFS module is probed before pmic used to power that device.
> In this case defer probe was happening and that clock was disabled by
> UFS driver, causing whole boot to hang on next CMU access.
>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel at gmail.com>
> ---
> Changes from v1:
> - Instead of marking clock as critical, enable it manually in driver.
> ---
> drivers/clk/samsung/clk-exynos7.c | 5 +++++
> 1 file changed, 5 insertions(+)
Acked-by: Krzysztof Kozlowski <krzk at kernel.org>
Best regards,
Krzysztof
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