[PATCH 2/2] arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files
Rafał Miłecki
zajec5 at gmail.com
Wed Nov 4 07:07:28 EST 2020
On 04.11.2020 11:35, Robin Murphy wrote:
> On 2020-10-28 10:11, Rafał Miłecki wrote:
> [...]
>> + cpu0: cpu at 0 {
>> + device_type = "cpu";
>> + compatible = "brcm,cortex-b53", "arm,cortex-a53";
>
> Erm, there's no binding for that - did you mean "brcm,brahma-b53"?
I'm not sure if that's the same thing. Unfortunately I don't have access to
any Broadcom documentation.
Florian: could you try to verify that, please?
>> + reg = <0x0>;
>> + next-level-cache = <&l2>;
>> + };
> [...]
>> + gic: interrupt-controller at 81000000 {
>> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>
> There's really no logical reason for a 64-bit system to pretend to be compatible with Cortex-A9. This is presumably GIC-400 (or maybe GIC-500) so it would be better to describe it as what it is.
Right, sorry, I'm totally new to the arm64. I just found that working and
noticed few boards using it. They may require tweaking too probably:
$ grep "arm,cortex-a.*-gic" arch/arm64/boot/dts/*/*.dts*
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi: compatible = "arm,gic-400", "arm,cortex-a15-gic";
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi: compatible = "arm,gic-400", "arm,cortex-a15-gic";
arch/arm64/boot/dts/apm/apm-shadowcat.dtsi: compatible = "arm,cortex-a15-gic";
arch/arm64/boot/dts/apm/apm-storm.dtsi: compatible = "arm,cortex-a15-gic";
arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi: compatible = "arm,gic-400", "arm,cortex-a15-gic";
arch/arm64/boot/dts/arm/juno-base.dtsi: compatible = "arm,gic-400", "arm,cortex-a15-gic";
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts: compatible = "arm,gic-400", "arm,cortex-a15-gic";
arch/arm64/boot/dts/freescale/s32v234.dtsi: compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi: compatible = "arm,gic-400", "arm,cortex-a15-gic";
arch/arm64/boot/dts/nvidia/tegra132.dtsi: compatible = "arm,cortex-a15-gic";
>> + #interrupt-cells = <3>;
>> + #address-cells = <0>;
>> + interrupt-controller;
>> + reg = <0x00 0x81001000 0x00 0x1000>, <0x00 0x81002000 0x00 0x2000>;
>> + };
> [...]
>> + pmu {
>> + compatible = "arm,armv8-pmuv3";
>
> Use the appropriate compatible for the actual CPUs - this is real hardware, not a software model.
Thanks!
>> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
>> + };
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