[PATCH v3 2/2] ARM: dts: imx6q-tbs2910: Pass reset-assert-us

[Fabio Estevam]

According to the AR8035 datasheet:

"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."

Pass the 'reset-assert-us' property to describe such requirement.

While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.

Signed-off-by: Fabio Estevam <festevam at gmail.com>
---
Changes since v2:
- Use reset-gpios and reset-assert-us inside the mdio node
instead of the deprecated usage of phy-reset-gpios (Soeren)

 arch/arm/boot/dts/imx6q-tbs2910.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
index 1f34028c6397..861e05d53157 100644
--- a/arch/arm/boot/dts/imx6q-tbs2910.dts
+++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
@@ -99,7 +99,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii-id";
-	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 	phy-handle = <&phy>;
 	status = "okay";
 
@@ -110,6 +109,8 @@
 		phy: ethernet-phy at 4 {
 			reg = <4>;
 			qca,clk-out-frequency = <125000000>;
+			reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+			reset-assert-us = <10000>;
 		};
 	};
 };
-- 
2.17.1