[PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

[Linus Walleij]

On Wed, Nov 2, 2016 at 3:37 PM, Andrew Jeffery <andrew at aj.id.au> wrote:

> If a pin depending on bit 6 in SCU90 is requested for GPIO, the export
> will succeed but changes to the GPIO's value will not be accepted by the
> hardware. This is because the pinmux driver has misconfigured the SCU by
> writing 1 to the reserved bit.
>
> The description of SCU90[6] from the datasheet is 'Reserved, must keep
> at value ”0”'. The fix is to switch pinmux from the bit-flipping macro
> to explicitly configuring the .enable and .disable values to zero.
>
> The patch has been tested on an AST2500 EVB.
>
> Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver)
> Reported-by: Uma Yadlapati <yadlapat at us.ibm.com>
> Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
> ---
>
> This patch should be applied for 4.9.

Patch applied for fixes, adding Joel's review tag.

Yours,
Linus Walleij