[PATCH RFC 04/10] ARM: V7M: Add support for reading the CTR with CPUID_CACHETYPE

[Russell King - ARM Linux]

On Thu, Apr 21, 2016 at 09:18:16AM +0100, Vladimir Murzin wrote:
> @@ -79,5 +80,19 @@ static inline unsigned int read_ccsidr(void)
>  	asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val));
>  	return val;
>  }
> +#else /* CONFIG_CPU_V7M */
> +#include <asm/io.h>

Please use linux/io.h

> +#include "asm/v7m.h"
> +
> +static inline void set_csselr(unsigned int cache_selector)
> +{
> +	writel(cache_selector, (void *)(BASEADDR_V7M_SCB + V7M_SCB_CTR));

writel() doesn't take a void pointer.  It takes a void __iomem pointer.
BASEADDR_V7M_SCB may need to be defined more appropriately.

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