[PATCH 1/2] Documentation: DT: vdma: Add clock support for vdma

[Appana Durga Kedareswara Rao]

Hi Shubhrajyoti,

> -----Original Message-----
> From: Shubhrajyoti Datta [mailto:shubhrajyoti.datta at gmail.com]
> Sent: Wednesday, April 20, 2016 1:30 PM
> To: Appana Durga Kedareswara Rao <appanad at xilinx.com>
> Cc: Rob Herring <robh+dt at kernel.org>; Pawel Moll <pawel.moll at arm.com>;
> Mark Rutland <mark.rutland at arm.com>; Ian Campbell
> <ijc+devicetree at hellion.org.uk>; Kumar Gala <galak at codeaurora.org>; Michal
> Simek <michals at xilinx.com>; Soren Brinkmann <sorenb at xilinx.com>;
> vinod.koul at intel.com; dan.j.williams at intel.com; Appana Durga Kedareswara
> Rao <appanad at xilinx.com>; Moritz Fischer <moritz.fischer at ettus.com>;
> Laurent Pinchart <laurent.pinchart at ideasonboard.com>;
> luis at debethencourt.com; Anirudha Sarangi <anirudh at xilinx.com>; Punnaiah
> Choudary Kalluri <punnaia at xilinx.com>; dmaengine at vger.kernel.org;
> devicetree at vger.kernel.org; linux-kernel at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org
> Subject: Re: [PATCH 1/2] Documentation: DT: vdma: Add clock support for vdma
> 
> On Wed, Apr 20, 2016 at 12:49 PM, Kedareswara rao Appana
> <appana.durga.rao at xilinx.com> wrote:
> > This patch updates the binding doc with clock description for vdma.
> >
> > Signed-off-by: Kedareswara rao Appana <appanad at xilinx.com>
> > ---
> >  Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 6
> > ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
> > b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
> > index fcc2b65..e1c9019 100644
> > --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
> > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
> > @@ -21,6 +21,10 @@ Required properties:
> >  - dma-channel child node: Should have at least one channel and can have up
> to
> >         two channels per device. This node specifies the properties of each
> >         DMA channel (see child node properties below).
> > +- clocks: Input clock specifier. Refer to common clock bindings.
> > +- clock-names: List of input clocks "axi_clk", "tx_clk", "txs_clk" (list of input
> > +              cloks may vary based on the ip configuration. see clock bindings
> > +              for more info).
> >
> >  Required properties for VDMA:
> >  - xlnx,num-fstores: Should be the number of framebuffers as configured in
> h/w.
> > @@ -60,6 +64,8 @@ axi_vdma_0: axivdma at 40030000 {
> >         xlnx,num-fstores = <0x8>;
> >         xlnx,flush-fsync = <0x1>;
> >         xlnx,addrwidth = <0x20>;
> > +       clocks = <&clk 0>, <&clk 1>, <&clk 2>;
> > +       clock-names = "axi_clk", "tx_clk", "txs_clk";
> 
> the module has
> s_axi_lite_aclk Clock I AXI VDMA AXI4-Lite interface clock  m_axi_mm2s_aclk
> Clock I AXI VDMA MM2S clock  m_axi_s2mm_aclk Clock I AXI VDMA S2MM clock
> m_axis_mm2s_aclk Clock I AXI VDMA MM2S AXIS clock  s_axis_s2mm_aclk
> Clock I AXI VDMA S2MM AXIS clock
> 
> I think a partial support is not wrong.

It is not partial support the driver is supporting all the clocks available in the IP (please refer the patch 2 in the series).
In the example I just putted clock names for TX path I mean when the IP is configured only with one channel.

Will update the clock-names example with the all the supported clocks in the next version.

> however  we should keep the names same as the TRM.

Why?? Why can't we use simple convenient names that refers to equivalent clocks of h/w 
I mean I used axi_clk instead of s_axi_lite_aclk,
Used tx_clk instead of m_axi_mm2s_aclk,
Used txs_clk instead of m_axis_mm2s_aclk.

If it mandatory to use names as the TRM please let me know will update the same v2...

Regards,
Kedar.

> 
> 
> >         dma-channel at 40030000 {
> >                 compatible = "xlnx,axi-vdma-mm2s-channel";
> >                 interrupts = < 0 54 4 >;
> > --
> > 2.1.2
> >
> >
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