[Query] How to measure the entry-latency-us and exit-latency-us on arm PSCI system
jszhang at marvell.com
Mon Nov 16 04:10:55 PST 2015
Now, I'd like to add cpuidle support to Marvell berlin arm64 soc via
drivers/cpuidle/dt_idle_states.c. The system is PSCI-1.0 compatible.
Per my understanding:
The entry-latency-us: the time from beginning of cpuidle_idle_call()
to the firmware's last WFI instruction. Should test more times to find
the longest time.
The exit-latency-us: the time from the first instruction of waken up cpu
to the end of cpuidle_idle_call(). Should test more times to find the longest
If cpufreq is available, we should fix the cpufreq to the lowest freq to do
the above test.
Even I have a look at idle-states binding doc, I'm still not sure whether my
solution to measure the entry-latency-us and exit-latency-us is correct or not,
could you please give suggestions?
Thanks in advance,
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