[PATCH-v3 2/3] mfd: 88pm800: Allow configuration of interrupt clear method

Vaibhav Hiremath vaibhav.hiremath at linaro.org
Wed Jun 24 22:26:15 PDT 2015

On Thursday 25 June 2015 05:33 AM, Krzysztof Kozlowski wrote:
> 2015-06-24 18:21 GMT+09:00 Vaibhav Hiremath <vaibhav.hiremath at linaro.org>:
>> As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe
>> (page 0) controls the method of clearing interrupt
>> status of 88pm800 family of devices;
>>    0: clear on read
>>    1: clear on write
>> This patch allows to configure this field, through DT.
>> Also, as suggested by "Lee Jones" renaming DT property and variable
>> field to appropriate name.
>> Signed-off-by: Zhao Ye <zhaoy at marvell.com>
>> Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath at linaro.org>
> It does not look like a property of the board. Instead it looks like a
> runtime configuration so it should not be part of DT bindings.

Why do you say that?

It is very well feature of 88PM860 device, where you can control irq
clear operation (either read/write).


> I understand that previously this was configured by platform data and
> now you want to move everything to DT. But this does not belong to
> DT...

Thats not completely true.
I think DT is the right place for this configuration.


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