some question about writel implement in arm platform

[yoma sophian]

hi all:
the implementation of writel in ARM is writel_relaxed() with barrier
before (DSB + outer cache sync).

if the memory is device memory, shall we still need outer cache sync?
if the memory is normal normal, under what circumstance we will write
it with writel.
As far as I know, the writel is used for register writing.

appreciate your kind help in advance,