[PATCH v5 1/2] Documentation: devicetree: Add ECC information to synopsys ddr controller

[Michal Simek]

On 11/27/2014 04:17 PM, Punnaiah Choudary Kalluri wrote:
> Add ECC information to synopsys ddr memory controller.
> 
> Signed-off-by: Punnaiah Choudary Kalluri <punnaia at xilinx.com>
> ---
>  .../bindings/memory-controllers/synopsys.txt       |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
> index f9c6454..a43d26d 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
> @@ -1,5 +1,9 @@
>  Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
>  
> +This controller has an optional ECC support in half-bus width (16-bit)
> +configuration. The ECC controller corrects one bit error and detects
> +two bit errors.
> +
>  Required properties:
>   - compatible: Should be 'xlnx,zynq-ddrc-a05'
>   - reg: Base address and size of the controllers memory area
> 

Acked-by: Michal Simek <michal.simek at xilinx.com>

Thanks,
Michal