48-bit VA support in the SMMU

Varun Sethi Varun.Sethi at freescale.com
Thu Nov 20 05:05:51 PST 2014

Thanks Will. But still, if things work for the stage 1 case why disable 48 bit support for the SMMU driver. Wouldn't stage-2 be relevant in case of virtual SMMU?


-----Original Message-----
From: Will Deacon [mailto:will.deacon at arm.com] 
Sent: Thursday, November 20, 2014 3:38 PM
To: Sethi Varun-B16395
Cc: Yoder Stuart-B08248; linux-arm-kernel at lists.infradead.org; Christoffer Dall
Subject: Re: 48-bit VA support in the SMMU

On Thu, Nov 20, 2014 at 01:25:18AM +0000, Varun Sethi wrote:
> What specific tweaks are required in the arm-smmu driver? I thought 
> that the upstream arm-smmu (3.18-rc3) driver does support 48 bit input 
> address (depended on the ARM64 kernel 48 bit support). Isn't this 
> dependent on the VA_BITS?

Yeah, but it won't work for stage-2 mappings. I'm currently rewriting the page table code to allow this (see my iommu/pgtbl branch).


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