[V10 PATCH 2/2] irqchip: gicv2m: Add supports for ARM GICv2m MSI(-X)
tglx at linutronix.de
Tue Nov 4 06:28:39 PST 2014
On Tue, 4 Nov 2014, Suravee Suthikulpanit wrote:
> And that's what I am trying to do here except that GIC is expecting that
> information to be passed to it via irq_domain_alloc_irqs(..., args) where args
> is struct of_phandle_args (e.g. in the kernel/irqdomain.c:
> irq_create_of_mapping). This works fine when specifying interrupt from DT, but
> that is not always the case.
> Currently, I can just create a fake of_phandle_args just to pass the hwirq
> information to GIC.
> --> gicv2m_setup_msi_irq()
> | struct of_phandle_args phan;
> | phan.np = NULL;
> | phan.args_count = 3;
> | phan.args = 0;
> | phan.args = hwirq - 32;
> | phan.args = IRQ_TYPE_EDGE_RISING;
> |--> irq_domain_alloc_irqs(d, 1, NUMA_NO_NODE, &phan);
> |--> gicv2m_domain_alloc(d, virq, nr_irqs, arg)
> |--> irq_domain_alloc_irqs_parent(d, virq, nr_irqs, arg);
> I am trying to figure out what would be a common data structure for this
> purpose that would work for both Dt and non-DT case (e.g. GICv2m MSI). Unless
> you think this is ok.
You need to sort that out with Marc. It needs to be done in a way
which is usable for the other potential use cases of stacked domains
on top of GIC.
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