[PATCH v2 7/7] ARM: zynq: DT: Migrate UART to Cadence binding

Michal Simek michal.simek at xilinx.com
Tue Mar 11 04:52:35 EDT 2014


On 03/10/2014 10:40 PM, Soren Brinkmann wrote:
> The Zynq UART is Cadence IP and the driver has been renamed accordingly.
> Migrate the DT to use the new binding for the UART driver.
> 
> Signed-off-by: Soren Brinkmann <soren.brinkmann at xilinx.com>
> Acked-by: Peter Crosthwaite <peter.crosthwaite at xilinx.com>
> Acked-by: Rob Herring <robh at kernel.org>
> ---
> This change depends on 'tty: xuartps: Rebrand driver as Cadence UART',
> which introduces the new clock-names.
> ---
>  arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 8b67b19392ec..0ed0d4b0579a 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -67,19 +67,19 @@
>  		};
>  
>  		uart0: uart at e0000000 {
> -			compatible = "xlnx,xuartps";
> +			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
>  			status = "disabled";
>  			clocks = <&clkc 23>, <&clkc 40>;
> -			clock-names = "ref_clk", "aper_clk";
> +			clock-names = "uart_clk", "pclk";
>  			reg = <0xE0000000 0x1000>;
>  			interrupts = <0 27 4>;
>  		};
>  
>  		uart1: uart at e0001000 {
> -			compatible = "xlnx,xuartps";
> +			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
>  			status = "disabled";
>  			clocks = <&clkc 24>, <&clkc 41>;
> -			clock-names = "ref_clk", "aper_clk";
> +			clock-names = "uart_clk", "pclk";
>  			reg = <0xE0001000 0x1000>;
>  			interrupts = <0 50 4>;
>  		};

This should be at least the part of 5/7 because between 5/7 and 7/7
driver will fail to probe.

Thanks,
Michal





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