[PATCH V2 2/3] pinctrl: allow concurrent gpio and mux function ownership of pins

[Stephen Warren]

On 03/06/2012 03:03 AM, Linus Walleij wrote:
> On Tue, Mar 6, 2012 at 1:22 AM, Stephen Warren <swarren at nvidia.com> wrote:
> 
>> Per recent updates to Documentation/gpio.txt, gpiolib drivers should
>> inform pinctrl when a GPIO is requested. pinctrl then marks that pin as
>> in-use for that GPIO function.
>>
>> When an SoC muxes pins in a group, it's quite possible for the group to
>> contain e.g. 6 pins, but only 4 of them actually be needed by the HW
>> module that's mux'd to them. In this case, the other 2 pins could be
>> used as GPIOs. However, pinctrl marks all the pins within the group as
>> in-use by the selected mux function. To allow the expected gpiolib
>> interaction, separate the concepts of pin ownership into two parts: One
>> for the mux function and one for GPIO usage. Finally, allow those two
>> ownerships to exist in parallel.
>>
>> Signed-off-by: Stephen Warren <swarren at nvidia.com>
> 
> Good, and 100% in accordance with earlier discussions.
> Acked-by: Linus Walleij <linus.walleij at linaro.org>

Linus, now that Grant has ack'd and applied the documentation change
behind this, could you take this one patch into the pinctrl tree. I
assume it's 3.5 material. After the 3.4 merge window closes, I'll
probably come back and ask for a stable pinctrl branch that I can use as
the basis for a Tegra branch that'll contain patch 3 in this series.

(Olof, I assume that's the right way to approach this; having Linus
apply both patches 2/3 in this series to pinctrl is going to make life
difficult in the Tegra tree, since my outstanding patches to convert
Tegra to use pinctrl will touch many of the same files as patch 3 in
this series, in conflicting or dependent ways.)

Thanks.