[RFC PATCH 2/2] ARMv7: Invalidate the TLB before freeing page tables

[Catalin Marinas]

On 15 February 2011 12:14, Russell King - ARM Linux
<linux at arm.linux.org.uk> wrote:
> Note that the generic code doesn't allow us to delay frees on UP as it
> assumes that if there's no TLB entry, the CPU won't speculatively
> prefetch.  This seems to be where ARM differs from the rest of the
> planet.  Please confirm that this is indeed the case.
>
>  arch/arm/include/asm/tlb.h |   79 +++++++++++++++++++++++++++++++++++++-------
>  1 files changed, 67 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
> index f41a6f5..1ca3e16 100644
> --- a/arch/arm/include/asm/tlb.h
> +++ b/arch/arm/include/asm/tlb.h
[...]
> +static inline void tlb_add_flush(struct mmu_gather *tlb, unsigned long addr)
> +{
> +       if (!tlb->fullmm) {
> +               if (addr < tlb->range_start)
> +                       tlb->range_start = addr;
> +               if (addr + PAGE_SIZE > tlb->range_end)
> +                       tlb->range_end = addr + PAGE_SIZE;
> +       }
> +}
[...]
> +static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
> +       unsigned long addr)
> +{
> +       pgtable_page_dtor(pte);
> +       tlb_add_flush(addr);
> +       tlb_remove_page(tlb, pte);
>  }

The above call to tlb_add_flush() would only add a PAGE_SIZE. But
since we free an entire PTE, shouldn't the range cover addr ..
addr+PTRS_PER_PTE*PAGE_SIZE?

-- 
Catalin