Highmem issues with MMC filesystem

[Russell King - ARM Linux]

On Fri, Mar 19, 2010 at 09:17:19AM -0400, Nicolas Pitre wrote:
> And in this case, the same SATA driver is used on two different system, 
> one being ARMv5 with absolutely no issues with highmem, and the other 
> being ARMv6 with highmem problems.  So that pretty much rules out IDE 
> driver bugs.

No it doesn't - there's more changes between ARMv5 and ARMv6 than just
the cache model.  There's weak memory ordering effects too.

A missing barrier or a badly implemented barrier can result in ARMv5
and earlier working perfectly, but ARMv6+ randomly failing.

Eg, we know that ARMv6+ CPUs with L2 cache, the wmb() implementation is
not sufficient, and DMA can be started before the write to
dma_alloc_coherent memory has become visible to the DMA controller, and
that's a topic of discussion at the present time.