[PATCH v2 2/5] ARM: S5P: Added default pll values for APLL 800/1000MHz

Jassi Brar jassisinghbrar at gmail.com
Fri Jul 16 23:43:42 EDT 2010


On Fri, Jul 16, 2010 at 9:22 PM, Kukjin Kim <kgene.kim at samsung.com> wrote:
> MyungJoo Ham wrote:
>>
>> CPUFREQ of S5PV210 uses different APLL settings and we provide
>> such values for CPUFREQ at pll.h. We have been using differently
>> between EVT0 and EVT1 machines. Although this version of kernel
>> assumes that the CPU is EVT1, users may use code for EVT0 later.
>>
>> Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
>> ARMCLK, APLL should be 800MHz.
>>
>> Signed-off-by: MyungJoo Ham <myungjoo.ham at samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park at samsung.com>
>> ---
>>  arch/arm/plat-s5p/include/plat/pll.h |    8 ++++++++
>>  1 files changed, 8 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/plat-s5p/include/plat/pll.h
> b/arch/arm/plat-s5p/include/plat/pll.h
>> index 7db3227..3112aba 100644
>> --- a/arch/arm/plat-s5p/include/plat/pll.h
>> +++ b/arch/arm/plat-s5p/include/plat/pll.h
>> @@ -21,6 +21,14 @@
>>
>>  #include <asm/div64.h>
>>
>> +#ifdef CONFIG_CPU_S5PC110_EVT0_ERRATA
>
> Actually, EVT0 is not real chip and not for mass production.
> So don't use in here.

That was my point in a thread few days ago when I suggested we
be careful while pushing code upstream.
Rather than flood mainline Samsung support with any hardware
we can get our hands on, we need to strategically select
SoCs (& their versions) and machines so that we have maximum
overlap of features and, equally important, _users_ of that code.
That will help us concentrate our efforts on support needed by most
of the users and devices.



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