[PATCH] ARM: S5PV210: Fix on SECTION_SIZE_BITS on S5PV210/S5PC110.

[Kukjin Kim]

Joonyoung Shim wrote:
> 
> On 7/7/2010 8:27 AM, Kukjin Kim wrote:
> > Russell King wrote:
> > Hi Russell :-)
> >
> >> On Tue, Jul 06, 2010 at 01:36:47PM +0900, Kukjin Kim wrote:
> >>> This patch fixes on SECTION_SIZE_BITS for Sparsemem on
> S5PV210/S5PC110.
> >>> Because smallest size of a bank on S5PV210/S5PC110 is aligned by 16MB.
> >>> So each section's maximum size should be 16MB.
> >> What is the spacing of chunks of memory, and minimum alignment of those
> >> chunks in physical address space?
> >
> > Some S5PC110(MCP D-type) has only available 80MiB in a bank.
> > So the space accounts for 432MiB in a DMC0, but larger memory(256MiB +
> > 128MiB) exists in a DMC1.
> >
> > As you know, the size of a section should be a power of 2 and a physical
> > address space of a section should be contiguous.
> > If a section size is greater than 16MiB, a section have a hole. So the
> > SECTION_SIZE_BITS should be 16MiB.
> >
> >> Also, what is the maximum physical address which memory can be located?
> >
> > Following is memory map of S5PV210/S5PC110.
> >
> > 0x80000000  -------------------
> >             |          |
> > 0x70000000  |          |
> >             |          |
> > 0x60000000  |  DMC 1  |  up to 1GiB
> >             |          |
> > 0x50000000  |          |
> >             |          |
> > 0x40000000  -----------------
> >             |          |
> > 0x30000000  |  DMC 0  |  up to 512MiB
> >             |          |
> > 0x20000000  -------------------
> >
> 
> Please see arch/arm/include/asm/sparsemem.h
> 
>  * SECTION_SIZE_BITS: The number of physical address bits to cover
>  *   the maximum amount of memory in a section.
> 
> I know 1 bank of S5PV210/S5PC110 have maximum 256MB, so i think
> SECTION_SIZE_BITS is 28.

Actually, the concept of section is different from bank.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim at samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.